zephyr/arch/x86/soc/atom/dts.fixup

/* SoC level DTS fixup file */

#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE	NS16550_F0009000_CURRENT_SPEED

#define CONFIG_UART_NS16550_PORT_1_NAME		NS16550_F0009000_LABEL

#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE	NS16550_F0008000_CURRENT_SPEED

#define CONFIG_UART_NS16550_PORT_0_NAME		NS16550_F0008000_LABEL

#define CONFIG_PHYS_RAM_ADDR			CONFIG_SRAM_BASE_ADDRESS

#define CONFIG_PHYS_LOAD_ADDR			CONFIG_FLASH_BASE_ADDRESS

#define CONFIG_RAM_SIZE				CONFIG_SRAM_SIZE

#define CONFIG_ROM_SIZE				CONFIG_FLASH_SIZE

#define CONFIG_IOAPIC_BASE_ADDRESS		INTEL_IOAPIC_FEC00000_BASE_ADDRESS

/* End of SoC Level DTS fixup file */