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zephyr/boards/x86/up_squared/Kconfig.defconfig

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boards: x86: add support for UP Squared (Pentium/Celeron) This adds a primitive board configuration for the UP Squared board containing Apollo Lake based Pentinum and Celeron SoC. This has been tested on model UPS-APLP4-A10-0432. This starts from the minnowboard configuration, and document from galileo. Origin: Original Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-13 05:28:58 +08:00
if BOARD_UP_SQUARED
config BOARD
default "up_squared"
config BUILD_OUTPUT_STRIPPED
def_bool y
boards/x86: up_squared: add I2C configurations Add the necessary bits to enable the I2C controllers on the UP Squared board. Only the ones exposed through the HAT connector(s) are enabled by default. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-24 05:35:15 +08:00
if I2C
config I2C_DW
def_bool y
config I2C_0
def_bool y
config I2C_1
def_bool y
endif # I2C
boards/x86: up_squared: updates SYS_CLOCK_HW_CYCLES_PER_SEC Sets the HPET timer frequency (enabled by default) to 19.2MHz. And also sets the local APIC timer frequencies according to the SoC variant. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-09-20 01:15:11 +08:00
config SYS_CLOCK_HW_CYCLES_PER_SEC
# HPET Timer: 19.2MHz
default 19200000 if HPET_TIMER
# Atom E3940 TSC: 1593.600MHz
default 1593600000 if (LOAPIC_TIMER && BOARD_UP_SQUARED_ATOM)
# Celeron N3550 base core freq: 1.1GHz
default 1100000000 if (LOAPIC_TIMER && BOARD_UP_SQUARED_CELERON)
# Pentium N3550 base core freq: 1.1GHz
default 1100000000 if (LOAPIC_TIMER && BOARD_UP_SQUARED_PENTIUM)
boards: x86: add support for UP Squared (Pentium/Celeron) This adds a primitive board configuration for the UP Squared board containing Apollo Lake based Pentinum and Celeron SoC. This has been tested on model UPS-APLP4-A10-0432. This starts from the minnowboard configuration, and document from galileo. Origin: Original Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-13 05:28:58 +08:00
endif # BOARD_UP_SQUARED