2019-07-04 05:40:38 +08:00
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/* ssd16xx_regs.h - Registers definition for SSD16XX compatible controller */
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/*
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* Copyright (c) 2018 PHYTEC Messtechnik GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __SSD16XX_REGS_H__
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#define __SSD16XX_REGS_H__
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#define SSD16XX_CMD_GDO_CTRL 0x01
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#define SSD16XX_CMD_GDV_CTRL 0x03
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#define SSD16XX_CMD_SDV_CTRL 0x04
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#define SSD16XX_CMD_SOFTSTART 0x0c
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#define SSD16XX_CMD_GSCAN_START 0x0f
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#define SSD16XX_CMD_SLEEP_MODE 0x10
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#define SSD16XX_CMD_ENTRY_MODE 0x11
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#define SSD16XX_CMD_SW_RESET 0x12
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2020-05-11 18:36:02 +08:00
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#define SSD16XX_CMD_TSENSOR_SELECTION 0x18
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2019-07-04 05:40:38 +08:00
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#define SSD16XX_CMD_TSENS_CTRL 0x1a
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#define SSD16XX_CMD_MASTER_ACTIVATION 0x20
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#define SSD16XX_CMD_UPDATE_CTRL1 0x21
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#define SSD16XX_CMD_UPDATE_CTRL2 0x22
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#define SSD16XX_CMD_WRITE_RAM 0x24
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2019-07-09 22:10:12 +08:00
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#define SSD16XX_CMD_WRITE_RED_RAM 0x26
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2019-07-04 05:40:38 +08:00
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#define SSD16XX_CMD_VCOM_SENSE 0x28
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#define SSD16XX_CMD_VCOM_SENSE_DURATON 0x29
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#define SSD16XX_CMD_PRGM_VCOM_OTP 0x2a
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#define SSD16XX_CMD_VCOM_VOLTAGE 0x2c
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#define SSD16XX_CMD_PRGM_WS_OTP 0x30
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2020-05-11 18:36:02 +08:00
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#define SSD16XX_CMD_LOAD_WS_OTP 0x31
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2019-07-04 05:40:38 +08:00
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#define SSD16XX_CMD_UPDATE_LUT 0x32
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#define SSD16XX_CMD_PRGM_OTP_SELECTION 0x36
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#define SSD16XX_CMD_OTP_SELECTION_CTRL 0x37
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#define SSD16XX_CMD_DUMMY_LINE 0x3a
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#define SSD16XX_CMD_GATE_LINE_WIDTH 0x3b
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#define SSD16XX_CMD_BWF_CTRL 0x3c
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#define SSD16XX_CMD_RAM_XPOS_CTRL 0x44
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#define SSD16XX_CMD_RAM_YPOS_CTRL 0x45
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#define SSD16XX_CMD_RAM_XPOS_CNTR 0x4e
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#define SSD16XX_CMD_RAM_YPOS_CNTR 0x4f
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/* Data entry sequence modes */
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#define SSD16XX_DATA_ENTRY_MASK 0x07
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#define SSD16XX_DATA_ENTRY_XDYDX 0x00
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#define SSD16XX_DATA_ENTRY_XIYDX 0x01
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#define SSD16XX_DATA_ENTRY_XDYIX 0x02
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#define SSD16XX_DATA_ENTRY_XIYIX 0x03
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#define SSD16XX_DATA_ENTRY_XDYDY 0x04
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#define SSD16XX_DATA_ENTRY_XIYDY 0x05
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#define SSD16XX_DATA_ENTRY_XDYIY 0x06
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#define SSD16XX_DATA_ENTRY_XIYIY 0x07
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/* Options for display update */
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#define SSD16XX_CTRL1_INITIAL_UPDATE_LL 0x00
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#define SSD16XX_CTRL1_INITIAL_UPDATE_LH 0x01
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#define SSD16XX_CTRL1_INITIAL_UPDATE_HL 0x02
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#define SSD16XX_CTRL1_INITIAL_UPDATE_HH 0x03
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/* Options for display update sequence */
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#define SSD16XX_CTRL2_ENABLE_CLK 0x80
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#define SSD16XX_CTRL2_ENABLE_ANALOG 0x40
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2020-05-11 18:36:02 +08:00
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#define SSD16XX_CTRL2_LOAD_TEMPERATURE 0x20
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#define SSD16XX_CTRL2_LOAD_LUT 0x10
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2019-07-04 05:40:38 +08:00
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#define SSD16XX_CTRL2_TO_INITIAL 0x08
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#define SSD16XX_CTRL2_TO_PATTERN 0x04
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#define SSD16XX_CTRL2_DISABLE_ANALOG 0x02
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#define SSD16XX_CTRL2_DISABLE_CLK 0x01
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#define SSD16XX_SLEEP_MODE_DSM 0x01
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#define SSD16XX_SLEEP_MODE_PON 0x00
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/* Default values */
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#define SSD16XX_VAL_DUMMY_LINE 0x1a
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#define SSD16XX_VAL_GATE_LWIDTH 0x08
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/* time constants in ms */
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#define SSD16XX_RESET_DELAY 1
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#define SSD16XX_BUSY_DELAY 1
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#endif /* __SSD16XX_REGS_H__ */
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