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zephyr/soc/st/stm32/stm32l1/soc.c

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soc: arm: st_stm32: Add STM32L1 SoC series Add STM32L1 SoC series support with STM32L15XXB as the target SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-01 20:51:51 +08:00
/*
* Copyright (c) 2019 Linaro Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief System/hardware module for STM32L1 processor
*/
soc: migrate includes to <zephyr/...> In order to bring consistency in-tree, migrate all soc code to the new prefix <zephyr/...>. Note that the conversion has been scripted, refer to zephyrproject-rtos#45388 for more details. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 17:11:04 +08:00
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/linker/linker-defs.h>
soc: arm: st_stm32: Add STM32L1 SoC series Add STM32L1 SoC series support with STM32L15XXB as the target SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-01 20:51:51 +08:00
#include <string.h>
soc: arm: stm32l1: set voltage scaling to range1 Default Voltage scaling range selection (range2) doesn't allow to configure Max frequency switch to range1 to match any frequency Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-07-12 16:53:15 +08:00
#include <stm32_ll_bus.h>
#include <stm32_ll_pwr.h>
soc: arm: st_stm32: Add STM32L1 SoC series Add STM32L1 SoC series support with STM32L15XXB as the target SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-01 20:51:51 +08:00
modules: cmsis: move glue code to modules/cmsis The CMSIS module glue code was part of arch/ directory. Move it to modules/cmsis, and provide a single entry point for it: cmsis_core.h. This entry header will include the right CMSIS header (M or A/R). To make this change possible, CMSIS module Kconfig/CMake are declared as external, allowing us to add a new Zephyr include directory. All files including CMSIS have been updated. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-30 00:22:37 +08:00
#include <cmsis_core.h>
soc: arm: st_stm32: Add STM32L1 SoC series Add STM32L1 SoC series support with STM32L15XXB as the target SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-01 20:51:51 +08:00
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run from the very beginning.
* So the init priority has to be 0 (zero).
*
* @return 0
*/
init: remove the need for a dummy device pointer in SYS_INIT functions The init infrastructure, found in `init.h`, is currently used by: - `SYS_INIT`: to call functions before `main` - `DEVICE_*`: to initialize devices They are all sorted according to an initialization level + a priority. `SYS_INIT` calls are really orthogonal to devices, however, the required function signature requires a `const struct device *dev` as a first argument. The only reason for that is because the same init machinery is used by devices, so we have something like: ```c struct init_entry { int (*init)(const struct device *dev); /* only set by DEVICE_*, otherwise NULL */ const struct device *dev; } ``` As a result, we end up with such weird/ugly pattern: ```c static int my_init(const struct device *dev) { /* always NULL! add ARG_UNUSED to avoid compiler warning */ ARG_UNUSED(dev); ... } ``` This is really a result of poor internals isolation. This patch proposes a to make init entries more flexible so that they can accept sytem initialization calls like this: ```c static int my_init(void) { ... } ``` This is achieved using a union: ```c union init_function { /* for SYS_INIT, used when init_entry.dev == NULL */ int (*sys)(void); /* for DEVICE*, used when init_entry.dev != NULL */ int (*dev)(const struct device *dev); }; struct init_entry { /* stores init function (either for SYS_INIT or DEVICE*) union init_function init_fn; /* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows * to know which union entry to call. */ const struct device *dev; } ``` This solution **does not increase ROM usage**, and allows to offer clean public APIs for both SYS_INIT and DEVICE*. Note that however, init machinery keeps a coupling with devices. **NOTE**: This is a breaking change! All `SYS_INIT` functions will need to be converted to the new signature. See the script offered in the following commit. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> init: convert SYS_INIT functions to the new signature Conversion scripted using scripts/utils/migrate_sys_init.py. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> manifest: update projects for SYS_INIT changes Update modules with updated SYS_INIT calls: - hal_ti - lvgl - sof - TraceRecorderSource Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> tests: devicetree: devices: adjust test Adjust test according to the recently introduced SYS_INIT infrastructure. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> tests: kernel: threads: adjust SYS_INIT call Adjust to the new signature: int (*init_fn)(void); Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-19 15:33:44 +08:00
static int stm32l1_init(void)
soc: arm: st_stm32: Add STM32L1 SoC series Add STM32L1 SoC series support with STM32L15XXB as the target SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-01 20:51:51 +08:00
{
/* Update CMSIS SystemCoreClock variable (HCLK) */
/* At reset, system core clock is set to 2.1 MHz from MSI */
SystemCoreClock = 2097000;
soc: arm: stm32l1: set voltage scaling to range1 Default Voltage scaling range selection (range2) doesn't allow to configure Max frequency switch to range1 to match any frequency Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-07-12 16:53:15 +08:00
/* Default Voltage scaling range selection (range2)
* doesn't allow to configure Max frequency
* switch to range1 to match any frequency
*/
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
soc: arm: st_stm32: Add STM32L1 SoC series Add STM32L1 SoC series support with STM32L15XXB as the target SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-01 20:51:51 +08:00
return 0;
}
SYS_INIT(stm32l1_init, PRE_KERNEL_1, 0);