121 lines
3.9 KiB
C
121 lines
3.9 KiB
C
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/*
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* Copyright (c) 2020 Linaro Ltd.
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* STM32 SoC specific helpers for pinctrl driver
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*/
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#ifndef ZEPHYR_SOC_ARM_ST_STM32_COMMON_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_ST_STM32_COMMON_PINCTRL_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/types.h>
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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#include <zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h>
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#else
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#include <zephyr/dt-bindings/pinctrl/stm32-pinctrl.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @cond INTERNAL_HIDDEN */
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/** Type for STM32 pin. */
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typedef struct pinctrl_soc_pin {
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/** Pinmux settings (port, pin and function). */
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uint32_t pinmux;
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/** Pin configuration (bias, drive and slew rate). */
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uint32_t pincfg;
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} pinctrl_soc_pin_t;
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/**
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* @brief Utility macro to initialize pinmux field in #pinctrl_pin_t.
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*
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_STM32_PINMUX_INIT(node_id) DT_PROP(node_id, pinmux)
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/**
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* @brief Definitions used to initialize fields in #pinctrl_pin_t
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*/
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#define STM32_NO_PULL 0x0
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#define STM32_PULL_UP 0x1
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#define STM32_PULL_DOWN 0x2
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#define STM32_PUSH_PULL 0x0
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#define STM32_OPEN_DRAIN 0x1
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#define STM32_OUTPUT_LOW 0x0
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#define STM32_OUTPUT_HIGH 0x1
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#define STM32_GPIO_OUTPUT 0x1
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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/**
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* @brief Utility macro to initialize pincfg field in #pinctrl_pin_t (F1).
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*
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_STM32_PINCFG_INIT(node_id) \
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(((STM32_NO_PULL * DT_PROP(node_id, bias_disable)) << STM32_PUPD_SHIFT) | \
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((STM32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << STM32_PUPD_SHIFT) | \
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((STM32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << STM32_PUPD_SHIFT) | \
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((STM32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << STM32_CNF_OUT_0_SHIFT) | \
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((STM32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << STM32_CNF_OUT_0_SHIFT) | \
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((STM32_OUTPUT_LOW * DT_PROP(node_id, output_low)) << STM32_ODR_SHIFT) | \
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((STM32_OUTPUT_HIGH * DT_PROP(node_id, output_high)) << STM32_ODR_SHIFT) | \
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(DT_ENUM_IDX(node_id, slew_rate) << STM32_MODE_OSPEED_SHIFT))
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#else
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/**
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* @brief Utility macro to initialize pincfg field in #pinctrl_pin_t (non-F1).
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*
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_STM32_PINCFG_INIT(node_id) \
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(((STM32_NO_PULL * DT_PROP(node_id, bias_disable)) << STM32_PUPDR_SHIFT) | \
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((STM32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << STM32_PUPDR_SHIFT) | \
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((STM32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << STM32_PUPDR_SHIFT) | \
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((STM32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << STM32_OTYPER_SHIFT) | \
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((STM32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << STM32_OTYPER_SHIFT) | \
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((STM32_OUTPUT_LOW * DT_PROP(node_id, output_low)) << STM32_ODR_SHIFT) | \
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((STM32_OUTPUT_HIGH * DT_PROP(node_id, output_high)) << STM32_ODR_SHIFT) | \
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((STM32_GPIO_OUTPUT * DT_PROP(node_id, output_low)) << STM32_MODER_SHIFT) | \
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((STM32_GPIO_OUTPUT * DT_PROP(node_id, output_high)) << STM32_MODER_SHIFT) | \
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(DT_ENUM_IDX(node_id, slew_rate) << STM32_OSPEEDR_SHIFT))
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#endif /* CONFIG_SOC_SERIES_STM32F1X */
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/**
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* @brief Utility macro to initialize each pin.
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*
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* @param node_id Node identifier.
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* @param state_prop State property name.
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* @param idx State property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \
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{ .pinmux = Z_PINCTRL_STM32_PINMUX_INIT( \
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DT_PROP_BY_IDX(node_id, state_prop, idx)), \
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.pincfg = Z_PINCTRL_STM32_PINCFG_INIT( \
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DT_PROP_BY_IDX(node_id, state_prop, idx)) },
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/**
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* @brief Utility macro to initialize state pins contained in a given property.
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*
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* @param node_id Node identifier.
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* @param prop Property name describing state pins.
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*/
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT)}
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/** @endcond */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_SOC_ARM_ST_STM32_COMMON_PINCTRL_SOC_H_ */
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