54 lines
1.4 KiB
ArmAsm
54 lines
1.4 KiB
ArmAsm
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/*
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* Copyright (c) 2024 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <offsets.h>
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#include <xtensa/config/tie.h>
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#include <xtensa/config/tie-asm.h>
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/*
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* Load the HiFi registers from the hifi buffer in the BSA. Round the address
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* of this buffer up to XCHAL_CP1_SA_ALIGN bytes to guarantee the necessary
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* alignment.
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*
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* Upon entry ...
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* A0 - return address (do not modify)
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* A1 - address of BSA (do not modify)
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* A2 - available for use
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* A3 - available for use
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*/
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.global _xtensa_hifi_load
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.align 4
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_xtensa_hifi_load:
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addi a2, a1, (___xtensa_irq_bsa_t_hifi_OFFSET + XCHAL_CP1_SA_ALIGN - 1)
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movi a3, ~(XCHAL_CP1_SA_ALIGN - 1)
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and a2, a2, a3
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xchal_cp1_load a2 a3 a3 a3 a3 /* Only A2 and A3 are used by macro */
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ret
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/*
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* Save the HiFi registers into the hifi buffer in the BSA. Round the address
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* of this buffer up to XCHAL_CP1_SA_ALIGN bytes to guarantee the necessary
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* alignment.
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*
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* A0 - return address (do not modify)
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* A1 - address of BSA (do not modify)
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* A2 - available for use
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* A3 - available for use
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*/
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.global _xtensa_hifi_save
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.align 4
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_xtensa_hifi_save:
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addi a2, a1, (___xtensa_irq_bsa_t_hifi_OFFSET + XCHAL_CP1_SA_ALIGN - 1)
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movi a3, ~(XCHAL_CP1_SA_ALIGN - 1)
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and a2, a2, a3
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xchal_cp1_store a2 a3 a3 a3 a3 /* Only A2 and A3 are used by macro */
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ret
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