2017-09-08 02:07:36 +08:00
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#include "skeleton.dtsi"
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2017-11-07 01:32:33 +08:00
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#define __SIZE_K(x) (x * 1024)
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2017-09-08 02:07:36 +08:00
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "qemu32";
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reg = <0>;
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};
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};
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flash0: flash@00001000 {
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reg = <0x00001000 DT_FLASH_SIZE>;
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};
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sram0: memory@00400000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x00400000 DT_SRAM_SIZE>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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uart0: uart@f0008000 {
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2017-10-11 01:15:28 +08:00
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compatible = "ns16550";
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2017-09-08 02:07:36 +08:00
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reg = <0xf0008000 0x400>;
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label = "UART_0";
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status = "disabled";
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};
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uart1: uart@f0009000 {
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2017-10-11 01:15:28 +08:00
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compatible = "ns16550";
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2017-09-08 02:07:36 +08:00
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reg = <0xf0009000 0x400>;
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label = "UART_1";
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status = "disabled";
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};
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};
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};
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