zephyr/arch/arc/soc/quark_se_c1000_ss/Kbuild

ccflags-y +=-I$(srctree)/include
ccflags-y +=-I$(srctree)/include/drivers
ccflags-y +=-I$(srctree)/drivers
ccflags-$(CONFIG_ADC) +=-I$(srctree)/drivers/adc

asflags-y := ${ccflags-y}

obj-y = soc.o soc_config.o soc_power.o power.o
arc: add Quark SE Sensor Subsystem nanokernel support Change-Id: I8178076e9f8bf98c3149f3622aa2236070446c62 Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2015-11-22 20:23:41 +08:00			`ccflags-y +=-I$(srctree)/include`
			`ccflags-y +=-I$(srctree)/include/drivers`
			`ccflags-y +=-I$(srctree)/drivers`
			`ccflags-$(CONFIG_ADC) +=-I$(srctree)/drivers/adc`

			`asflags-y := ${ccflags-y}`

power: Add ARC core suspend and resume support When going into DEEP_SLEEP mode, the ARC core now saves its context. This includes: - All core registers - Stack pointer - Program counter (restored by jumping to the restore code) The arc reset code now checks if the GPS0 bit 2 is set. This is similar to the behavior of the x86 core done by the QMSI bootloader which is setting GPS0 bit 1 in order to call the restore path instead of cold boot path. The sample has been adapted in order to support the ARC. Jira: ZEP-1222 Change-Id: I375f03b16b8a5fd1f07ead55cf7e4947d6290c9f Signed-off-by: Julien Delayen <julien.delayen@intel.com> 2016-11-01 21:07:34 +08:00			`obj-y = soc.o soc_config.o soc_power.o power.o`