64 lines
1.9 KiB
C
64 lines
1.9 KiB
C
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/*
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* Copyright (c) 2020 Linaro Limited
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef DMA_ATMEL_SAMV71_H_
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#define DMA_ATMEL_SAMV71_H_
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/** Peripheral Hardware Request Line Identifier */
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#define DMA_PERID_HSMCI_TX_RX 0
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#define DMA_PERID_SPI0_TX 1
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#define DMA_PERID_SPI0_RX 2
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#define DMA_PERID_SPI1_TX 3
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#define DMA_PERID_SPI1_RX 4
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#define DMA_PERID_QSPI_TX 5
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#define DMA_PERID_QSPI_RX 6
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#define DMA_PERID_USART0_TX 7
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#define DMA_PERID_USART0_RX 8
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#define DMA_PERID_USART1_TX 9
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#define DMA_PERID_USART1_RX 10
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#define DMA_PERID_USART2_TX 11
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#define DMA_PERID_USART2_RX 12
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#define DMA_PERID_PWM0_TX 13
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#define DMA_PERID_TWIHS0_TX 14
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#define DMA_PERID_TWIHS0_RX 15
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#define DMA_PERID_TWIHS1_TX 16
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#define DMA_PERID_TWIHS1_RX 17
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#define DMA_PERID_TWIHS2_TX 18
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#define DMA_PERID_TWIHS2_RX 19
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#define DMA_PERID_UART0_TX 20
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#define DMA_PERID_UART0_RX 21
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#define DMA_PERID_UART1_TX 22
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#define DMA_PERID_UART1_RX 23
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#define DMA_PERID_UART2_TX 24
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#define DMA_PERID_UART2_RX 25
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#define DMA_PERID_UART3_TX 26
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#define DMA_PERID_UART3_RX 27
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#define DMA_PERID_UART4_TX 28
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#define DMA_PERID_UART4_RX 29
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#define DMA_PERID_DACC0_TX 30
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#define DMA_PERID_DACC1_TX 31
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#define DMA_PERID_SSC_TX 32
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#define DMA_PERID_SSC_RX 33
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#define DMA_PERID_PIOA_RX 34
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#define DMA_PERID_AFEC0_RX 35
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#define DMA_PERID_AFEC1_RX 36
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#define DMA_PERID_AES_TX 37
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#define DMA_PERID_AES_RX 38
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#define DMA_PERID_PWM1_TX 39
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#define DMA_PERID_TC0_RX 40
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#define DMA_PERID_TC3_RX 41
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#define DMA_PERID_TC6_RX 42
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#define DMA_PERID_TC9_RX 43
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#define DMA_PERID_I2SC0_TX_L 44
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#define DMA_PERID_I2SC0_RX_L 45
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#define DMA_PERID_I2SC1_TX_L 46
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#define DMA_PERID_I2SC1_RX_L 47
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#define DMA_PERID_I2SC0_TX_R 48
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#define DMA_PERID_I2SC0_RX_R 49
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#define DMA_PERID_I2SC1_TX_R 50
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#define DMA_PERID_I2SC1_RX_R 51
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#endif /* DMA_ATMEL_SAMV71_H_ */
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