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zephyr/dts/bindings/power/zephyr,power-state.yaml

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dts: power: Add power states support Add power state property binding and include this property in cpu. The pm-state attribute is a enum that matches with enum pm_state right now the only timing attribute is the minimum residency that is the minimum time for a power state be worthwhile. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-11-26 02:39:43 +08:00
# Copyright (c) 2020, Intel Corporation
# SPDX-License-Identifier: Apache-2.0
description: Properties for power management state
dts: power: Change pm state properties Making it looks more Linux alike Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-12-23 13:08:55 +08:00
compatible: "zephyr,power-state"
dts: power: Add power states support Add power state property binding and include this property in cpu. The pm-state attribute is a enum that matches with enum pm_state right now the only timing attribute is the minimum residency that is the minimum time for a power state be worthwhile. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-11-26 02:39:43 +08:00
properties:
dts: power: Change pm state properties Making it looks more Linux alike Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-12-23 13:08:55 +08:00
power-state-name:
dts: power: Add power states support Add power state property binding and include this property in cpu. The pm-state attribute is a enum that matches with enum pm_state right now the only timing attribute is the minimum residency that is the minimum time for a power state be worthwhile. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-11-26 02:39:43 +08:00
type: string
required: true
description: indicates a power state
enum:
- "active"
- "runtime-idle"
- "suspend-to-idle"
- "standby"
- "suspend-to-ram"
- "suspend-to-disk"
- "soft-off"
power: Add substate-id property for a power state There are platforms that have multiple states that maps to a specific Zephyr power state. To accommodate this sort of situation this commit adds an additional property to a power state that can be used by the platform. The power state now consists of two properties, a category and a substate-id. The former property is the current power state. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-13 02:26:05 +08:00
substate-id:
type: int
required: false
description: Platform specific identification.
dts: power: Add power states support Add power state property binding and include this property in cpu. The pm-state attribute is a enum that matches with enum pm_state right now the only timing attribute is the minimum residency that is the minimum time for a power state be worthwhile. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-11-26 02:39:43 +08:00
min-residency-us:
type: int
required: false
description: |
Minimum residency duration in microseconds. It is the minimum time for a
dts: power: More information about min-residency-us Make it clear that min-residency-us includes the time required to entry in the state. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-04-02 06:37:22 +08:00
given idle state to be worthwhile energywise. It includes the time to enter
dts: power: Add exit-latency-us field Exit latency is the maximum time required by a CPU to transition from a specific idle state to active state. This information is going to be used to properly configure the wake up event in order to the system be able to execute the next scheduled task. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-04-02 06:44:57 +08:00
in this state.
exit-latency-us:
type: int
required: false
description: |
Worst case latency in microseconds required to exit the idle state.