2019-04-06 21:08:09 +08:00
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/* SPDX-License-Identifier: Apache-2.0 */
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2017-07-22 14:10:56 +08:00
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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2018-09-19 03:51:26 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2019-06-21 20:47:08 +08:00
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cpu0: cpu@0 {
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2017-07-22 14:10:56 +08:00
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compatible = "arm,cortex-m4f";
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2018-09-18 20:50:37 +08:00
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reg = <0>;
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2017-07-22 14:10:56 +08:00
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};
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};
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2018-09-18 20:59:03 +08:00
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sram0: memory@20000000 {
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2019-01-23 05:07:58 +08:00
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compatible = "mmio-sram";
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2017-07-22 14:10:56 +08:00
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};
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2018-09-18 20:59:03 +08:00
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flash0: serial-flash@0 {
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2017-07-22 14:10:56 +08:00
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compatible = "serial-flash";
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};
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2019-06-21 20:49:23 +08:00
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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2017-07-22 14:10:56 +08:00
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soc {
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uart0: uart@40001000 {
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compatible = "ti,msp432p4xx-uart";
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reg = <0x40001000 0x400>;
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interrupts = <32 0>;
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2019-06-21 20:49:23 +08:00
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clocks = <&sysclk>;
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2017-07-22 14:10:56 +08:00
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status = "disabled";
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label = "UART_0";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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