84 lines
2.7 KiB
ArmAsm
84 lines
2.7 KiB
ArmAsm
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/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define _ASMLANGUAGE
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#include <toolchain.h>
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/* imports */
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GTEXT(__reset)
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GTEXT(__irq_wrapper)
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/*
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* following riscv32-qemu specs
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* IVT is placed at 0x000001000 and is mapped as follows:
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* 0x00001000: reset
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* 0x00001004: non-maskable interrupt (nmi) vector
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* 0x00001010: machine trap (mt) vector
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*
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* Call __irq_wrapper to handle all interrupts/exceptions/faults
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*/
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SECTION_FUNC(vectors, vinit)
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.option norvc;
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/*
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* jal instruction cannot be used to jump to address whose offset
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* is > 12-bits wide. In this case, we have to use a call or tail
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* instruction to jump to a far-away sub-routine.
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*
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* Given that IVT is found at a different address-space than the
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* RAM in riscv32-qemu, we have to use call or tail instructions
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* to jump to __reset or __isr_wrapper subroutines.
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* However, call or tail instructions are pseudo instructions,
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* which generate two base-instructions upon compilation. In this case,
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* using them at a particular entry in the IVT will overwrite the next
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* entry in the IVT. For example, using tail instruction in the
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* reset vector, will overwrite the nmi-vector entry. To prevent this,
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* perform a two-phase jump instructions to __reset or __irq_wrapper
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* subroutines. The first jump performs a jal instruction, which will
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* jump to an offset in the same vector address-space, but outside the
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* IVT. The second jump performs a tail instruction to the __reset
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* or __irq_wrapper subroutines.
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*/
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/* Call __reset for reset vector */
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jal x0, do_reset
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/* Call __irq_wrapper for nmi vector */
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jal x0, do_irq_wrapper
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.org 0x10
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/* Call __irq_wrapper for mt vector */
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jal x0, do_irq_wrapper
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.org 0x400 /* we are outside IVT */
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do_reset:
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/*
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* Set mtvec (Machine Trap-Vector Base-Address Register)
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* to __irq_wrapper, so that we jump directly to __irq_wrapper,
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* instead to the default machine trap vector address in IVT.
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* This will preserve us from performing two jump instructions upon
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* an interrupt.
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*/
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la t0, __irq_wrapper
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csrw mtvec, t0
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/* Jump to __reset */
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tail __reset
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do_irq_wrapper:
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tail __irq_wrapper
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