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zephyr/arch/x86/core/intel64.cmake

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CMake
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arch/x86: split CMakeLists.txt into subarch-specific files Separate common, ia32-specific, and x64-specific into separate files. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-13 05:30:14 +08:00
# Copyright (c) 2019 Intel Corp.
# SPDX-License-Identifier: Apache-2.0
arch/x86: initial Intel64 bootstrap framework This patch adds basic build infrastructure, definitions, a linker script, etc. to use the Zephyr and 0.10.1 SDK to build a 64-bit ELF binary suitable for use with GRUB to minimally bootstrap an Apollo Lake (e.g., UpSquared) board. The resulting binary can hardly be called a Zephyr kernel as it is lacking most of the glue logic, but it is a starting point to flesh those out in the x86 tree. The "kernel" builds with a few harmless warnings, both with GCC from the Zephyr SDK and with ICC (which is currently being worked on in a separate branch). These warnings are either related to pointer size differences (since this is an LP64 build) and/or dummy functions that will be replaced with working versions shortly. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-05 04:49:06 +08:00
#
# XXX: When using the Intel toolchain, cmake doesn't recognize .S files
# automatically, and I can't be bothered to figure out how to fix this.
#
set_property(SOURCE intel64/locore.S PROPERTY LANGUAGE ASM)
zephyr_library_sources(
intel64/locore.S
arch/x86: (Intel64) use per-CPU parameter struct for CPU startup A new 'struct x86_cpuboot' is created as well as an instance called 'x86_cpuboot[]' which contains per-CPU boot data (initial stack, entry function/arg, selectors, etc.). The locore now consults this table to set up per-CPU registers, etc. during early boot. Also, rename tss.c to cpu.c as its scope is growing. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-29 08:52:07 +08:00
intel64/cpu.c
arch/x86: Add exception reporting code for Intel64 Fleshed out z_arch_esf_t and added code to build this frame when exceptions occur. Created a separate small stack for exceptions and shifted the initialization code to use this instead of the IRQ stack. Moved IRQ stack(s) to irq.c. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-16 04:18:36 +08:00
intel64/irq.c
arch/x86: initial Intel64 bootstrap framework This patch adds basic build infrastructure, definitions, a linker script, etc. to use the Zephyr and 0.10.1 SDK to build a 64-bit ELF binary suitable for use with GRUB to minimally bootstrap an Apollo Lake (e.g., UpSquared) board. The resulting binary can hardly be called a Zephyr kernel as it is lacking most of the glue logic, but it is a starting point to flesh those out in the x86 tree. The "kernel" builds with a few harmless warnings, both with GCC from the Zephyr SDK and with ICC (which is currently being worked on in a separate branch). These warnings are either related to pointer size differences (since this is an LP64 build) and/or dummy functions that will be replaced with working versions shortly. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-05 04:49:06 +08:00
intel64/thread.c
arch/x86: Add exception reporting code for Intel64 Fleshed out z_arch_esf_t and added code to build this frame when exceptions occur. Created a separate small stack for exceptions and shifted the initialization code to use this instead of the IRQ stack. Moved IRQ stack(s) to irq.c. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-16 04:18:36 +08:00
intel64/fatal.c
arch/x86: initial Intel64 bootstrap framework This patch adds basic build infrastructure, definitions, a linker script, etc. to use the Zephyr and 0.10.1 SDK to build a 64-bit ELF binary suitable for use with GRUB to minimally bootstrap an Apollo Lake (e.g., UpSquared) board. The resulting binary can hardly be called a Zephyr kernel as it is lacking most of the glue logic, but it is a starting point to flesh those out in the x86 tree. The "kernel" builds with a few harmless warnings, both with GCC from the Zephyr SDK and with ICC (which is currently being worked on in a separate branch). These warnings are either related to pointer size differences (since this is an LP64 build) and/or dummy functions that will be replaced with working versions shortly. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-05 04:49:06 +08:00
)
x86: implement user mode on 64-bit - In early boot, enable the syscall instruction and set up necessary MSRs - Add a hook to update page tables on context switch - Properly initialize thread based on whether it will start in user or supervisor mode - Add landing function for system calls to execute the desired handler - Implement arch_user_string_nlen() - Implement logic for dropping a thread down to user mode - Reserve per-CPU storage space for user and privilege elevation stack pointers, necessary for handling syscalls when no free registers are available - Proper handling of gs register considerations when transitioning privilege levels Kernel page table isolation (KPTI) is not yet implemented. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-12-19 06:30:41 +08:00
zephyr_library_sources_ifdef(CONFIG_USERSPACE intel64/userspace.S)