2022-11-10 15:19:18 +08:00
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/*
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* Copyright 2022 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_mimx93_a55.dtsi>
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2022-11-10 15:32:09 +08:00
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#include "mimx93_evk-pinctrl.dtsi"
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2022-11-10 15:19:18 +08:00
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/ {
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model = "NXP i.MX93 A55";
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compatible = "fsl,mimx93";
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chosen {
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zephyr,console = &lpuart2;
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zephyr,shell-uart = &lpuart2;
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zephyr,sram = &sram0;
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};
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cpus {
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cpu@0 {
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status = "disabled";
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};
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};
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sram0: memory@c0000000 {
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reg = <0xc0000000 DT_SIZE_M(1)>;
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};
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};
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2023-09-25 10:28:15 +08:00
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&lpuart1 {
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status = "disabled";
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current-speed = <115200>;
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/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
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pinctrl-0 = <&uart1_default>;
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pinctrl-names = "default";
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};
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2022-11-10 15:19:18 +08:00
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&lpuart2 {
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status = "okay";
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current-speed = <115200>;
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2022-11-10 15:32:09 +08:00
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/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
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pinctrl-0 = <&uart2_default>;
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pinctrl-names = "default";
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2022-11-10 15:19:18 +08:00
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};
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