2018-07-07 23:13:15 +08:00
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# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NSIM_EM
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2019-06-18 02:31:12 +08:00
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config CPU_EM4_FPUDA
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2019-10-25 11:00:41 +08:00
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default y
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2018-07-07 23:13:15 +08:00
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config NUM_IRQ_PRIO_LEVELS
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# This processor supports 4 priority levels:
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# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
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default 4
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config NUM_IRQS
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# must be > the highest interrupt number used
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2019-08-01 14:25:50 +08:00
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default 30
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2018-07-07 23:13:15 +08:00
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config ARC_MPU_VER
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default 2
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config RGF_NUM_BANKS
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default 2
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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2019-03-26 16:02:41 +08:00
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default 5000000
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2018-07-07 23:13:15 +08:00
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config HARVARD
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2018-11-14 00:15:49 +08:00
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default y
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2018-07-07 23:13:15 +08:00
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config ARC_FIRQ
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2018-11-14 00:15:49 +08:00
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default y
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2018-07-07 23:13:15 +08:00
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config CACHE_FLUSHING
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2018-11-14 00:15:49 +08:00
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default y
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2018-07-07 23:13:15 +08:00
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2019-06-17 18:53:06 +08:00
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config FP_FPU_DA
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2019-10-25 12:25:49 +08:00
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default y
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2019-06-17 18:53:06 +08:00
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2018-07-07 23:13:15 +08:00
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if (ARC_MPU_VER = 2)
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config MAIN_STACK_SIZE
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default 2048
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config IDLE_STACK_SIZE
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default 2048
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config ZTEST_STACKSIZE
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default 2048
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2020-02-10 11:18:50 +08:00
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depends on ZTEST
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2018-07-07 23:13:15 +08:00
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endif # ARC_MPU_VER
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2019-11-01 17:24:07 +08:00
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endif # SOC_NSIM_EM
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