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zephyr/drivers/pinctrl/CMakeLists.txt

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drivers: pinctrl: initial skeleton Initial skeleton for pinctrl drivers. This patch includes common infrastructure and API definitions for pinctrl drivers. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-10 17:17:46 +08:00
# Copyright (c) 2021 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
zephyr_library()
zephyr_library_sources(common.c)
drivers: pinctrl: introduce new Telink B91 Pinctrl driver Pinctrl driver basic support for Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-02-11 20:09:30 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_TELINK_B91 pinctrl_b91.c)
drivers: pinctrl: gd32: initial support for AF based SoCs Add a pin control driver for GD32 SoCs using the AF model. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-11-02 04:37:04 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AF pinctrl_gd32_af.c)
drivers: pinctrl: gd32: initial support for AFIO based SoCs Add a pin control driver for GD32 SoCs using the AFIO model. Thanks to Gerson Fernando Budke for testing and implementation suggestions. Co-authored-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com> Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-11-05 06:18:09 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AFIO pinctrl_gd32_afio.c)
ITE: drviers/pinctrl: Add pinctrl driver for IT8XXX2 Add pinctrl driver for ITE IT8XXX2. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-01-07 11:01:07 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_ITE_IT8XXX2 pinctrl_ite_it8xxx2.c)
drivers: pinctrl: npcx: add initial pin-controller driver This CL is the initial version for npcx pinctrl driver and introduces pinctrl nodes for both IO-pads and peripheral devices for each npcx series. Users can set pin configuration via these nodes in the board layout DT file. It also wraps all configurations related to pin-muxing in pinctrl_soc.h. Regarding the other pin properties, we will implement them later. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-02-21 17:19:31 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NPCX pinctrl_npcx.c)
drivers: pinctrl: add numicro pinctrl driver This commit adds a pinctrl driver for the Nuvoton NuMicro family of processors. Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2022-09-24 01:21:39 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NUMICRO pinctrl_numicro.c)
drivers: pinctrl: nrf: initial support Add initial support for nRF pin controller driver. The implementation in this patch does not yet support any peripheral. Only states representation and basic driver functionality is introduced. Note: The nrf_pin_configure function has been marked as __unused since it may not be used in certain scenarios until all peripherals are supported by the pinctrl driver. For example, if only UART/E is supported but the board does not enable UART, the function will never get called. However, that board will likely have other peripherals that will gain support in the future. Thanks to Marti Bolivar for bindings documentation. Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no> Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-08-10 17:22:31 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NRF pinctrl_nrf.c)
drivers: pinctrl: add Renesas RCar PFC driver Introduce Pin Function Controller for Renesas R-Car family. This first implementation support to set a given pin as gpio or peripheral (GPSR), to set a peripheral function to a pin (IPSR), to set pull-up, pull-down (PUEN, PUD). In addition this driver allows to set driving capabilies(DRVCTRL). Pins are identified thanks to the per SoC binding for pin definition which also contains pin alternate function parameters. Some pins can also have driving capabilities, some have bias capabilities. In order to find the correct bias and drive registers pfc_r8a77951.c describes the different registers. Each SoCs or package will need to define getters for these registers: pfc_rcar_get_bias_regs() and pfc_rcar_get_drive_regs(). Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-12-03 21:22:01 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_RCAR_PFC pfc_rcar.c)
drivers: pinctrl: Added pinctrl driver for RPi Pico Added a pinctrl driver for the Raspberry Pi Pico series Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-11-30 06:29:09 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_RPI_PICO pinctrl_rpi_pico.c)
drivers: pinctrl: Update atmel sam driver to new api This update current Atmel sam pinctrl initiative to current Zephyr pinctrl API. It update current devicetree bindings and add the sam pinctrl driver. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-11 08:56:45 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM pinctrl_sam.c)
drivers: pinctrl: Update Atmel sam0 driver to new API This update current Atmel sam0 pinctrl initiative to current Zephyr pinctrl API. It update current devicetree bindings and add the sam0 pinctrl driver. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-11 09:41:29 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM0 pinctrl_sam0.c)
drivers: pinctrl: stm32: initial version Add initial version for STM32 pinctrl driver. Driver has been written re-using many of the already existing parts in drivers/pinmux/pinmux_stm32.c. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-06 20:33:46 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_STM32 pinctrl_stm32.c)
drivers: pinctrl: Add kinetis pinctrl driver Add kinetis pinctrl driver. Driver initializes clocks for each port, and exposes the pinctrl_configure_pins function required for pinctrl support. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-02-22 02:54:05 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_KINETIS pinctrl_kinetis.c)
drivers: pinctrl: Microchip MEC172x pinctrl driver Add core files for Microchip MEC172x pinctrl driver Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-01-21 03:51:01 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCHP_XEC pinctrl_mchp_xec.c)
drivers: pinctrl: refactor pin control support for imx rt Refactor iMX RT pin control support to use more generic names, as the IOMUXC peripheral is present on non RT iMX application cores. Additionally, make selection of the pin control driver occur at the SOC level. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-26 05:30:58 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX pinctrl_imx.c)
drivers: pinctrl: add SiFive pinctrl driver Add a pinctrl driver used in FE310-based boards. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-03-22 16:19:34 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_SIFIVE pinctrl_sifive.c)
drivers: pinctrl: Add LPC IOCON pinctrl driver Add lpc iocon pinctrl driver. Driver handles IOCON clock initialization as well as IOCON pin configuration Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-05 04:31:23 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_IOCON pinctrl_lpc_iocon.c)
drivers: pinctrl: add CC13XX/CC26XX pinctrl driver Add pinctrl driver for CC13XX/CC26XX family of SoCs to facilitate transition from pinmux to pinctrl. `IOCPortConfigureSet()` from TI hal driverlib used to implement the generic pinctrl driver. Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
2022-04-15 18:22:17 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_CC13XX_CC26XX pinctrl_cc13xx_cc26xx.c)
drivers: pinctrl: esp32: initial support add initial pinctrl driver support for ESP32. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-01-31 06:08:04 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_ESP32 pinctrl_esp32.c)
drivers: pinctrl: add OpenISA RV32M1 pinctrl driver Add OpenISA RV32M1 pinctrl driver. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-02 04:28:29 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_RV32M1 pinctrl_rv32m1.c)
drivers: pinctrl: Add Infineon CAT1 Pin controller driver Added initial version of Infineon CAT1 Pin controller driver. Added initial version of binding file for Infineon CAT1 Pinctrl driver. Added initial version of dt header for Infineon CAT1 pinctrl driver. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2023-02-23 20:04:53 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_INFINEON_CAT1 pinctrl_ifx_cat1.c)
drivers: pinctrl: add pinctrl driver for the Xilinx Zynq-7000 Add pinctrl driver for the Xilinx Zynq-7000 series SoCs. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-30 21:11:19 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_XLNX_ZYNQ pinctrl_xlnx_zynq.c)
drivers: pinctrl: Add driver for smartbond This adds pinctrl driver for Renesas SmartBond(tm) MCU family. Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
2022-07-11 19:35:49 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_SMARTBOND pinctrl_smartbond.c)
drivers: pinctrl: Add pinctrl driver for xmc4xxx Add pinctrl driver for infineon xmc4xxx devices. Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-07-14 22:01:23 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_XMC4XXX pinctrl_xmc4xxx.c)
drivers: pinctrl: rename S32 to NXP S32 Following updates previously done for other drivers, rename all occurrences of S32 to NXP S32 to avoid ambiguity. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-12-27 22:50:06 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_S32 pinctrl_nxp_s32.c)
drivers: pinctrl: Add Silabs Gecko pin controller This commit adds initial support for gecko pinctrl driver Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com> Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-09-07 17:00:47 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_GECKO pinctrl_gecko.c)
drivers: pinctrl: Add pinctrl support for TI K3 devices K3 is a common architecture used between different TI processor families Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-02-28 08:00:46 +08:00
zephyr_library_sources_ifdef(CONFIG_PINCTRL_TI_K3 pinctrl_ti_k3.c)