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zephyr/boards/arm/stm32l496g_disco/stm32l496g_disco_defconfig

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license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 21:08:09 +08:00
# SPDX-License-Identifier: Apache-2.0
boards: arm: Add support for STM32L496G Discovery board Add configuration, pinmux, dts and documentation for the STM32L496G Discovery board based on the STM32L496AG SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-09 20:29:01 +08:00
CONFIG_SOC_SERIES_STM32L4X=y
soc: stm32: STM32L4: Remove useless package digit Fixes #16733, applied to STM32L4 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-17 18:11:12 +08:00
CONFIG_SOC_STM32L496XX=y
boards: arm: Add support for STM32L496G Discovery board Add configuration, pinmux, dts and documentation for the STM32L496G Discovery board based on the STM32L496AG SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-09 20:29:01 +08:00
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
board: arm: Enable MPU for all STM32 boards supporting it Only boards with at least 64K Flash will activate MPU because: MPU + UERSPACE + All switches implicity activated (CONFIG_MPU_STACK_GUARD, CONFIG_ARM_STACK_PROTECTION ...) will consume about 40K Flash (value computed on nucleo_f767_zi on tests/arch/arm/arm_ramfunc/). Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-06-06 04:20:43 +08:00
# Enable MPU
CONFIG_ARM_MPU=y
boards: stm32: Turn hardware stack protection on by default Enable HW stack protection by default on all STM32 when possible. This excludes all series based on M0(FO) and M0+(G0/L0). Also this is made only on boards with enabled MPU (SRAM > 64K). Cf similar change on nRF boards: #28470 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-21 22:53:25 +08:00
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
boards: arm: Add support for STM32L496G Discovery board Add configuration, pinmux, dts and documentation for the STM32L496G Discovery board based on the STM32L496AG SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-09 20:29:01 +08:00
# enable uart driver
CONFIG_SERIAL=y
# enable pinmux
CONFIG_PINMUX=y
# enable GPIOs
CONFIG_GPIO=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
boards: stm32: fix default HSI clock configuration To avoid configuration surprises, replace CONFIG_CLOCK_STM32_PLL_SRC_HSI with CONFIG_CLOCK_STM32_PLL_SRC_HSI=y No impact today, but could depend on tools. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-12-14 21:14:03 +08:00
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
boards: arm: Add support for STM32L496G Discovery board Add configuration, pinmux, dts and documentation for the STM32L496G Discovery board based on the STM32L496AG SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-09 20:29:01 +08:00
# produce 80MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y