2017-04-04 02:38:40 +08:00
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#include "armv6-m.dtsi"
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/ {
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cpus {
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2017-07-16 02:57:32 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2017-04-04 02:38:40 +08:00
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cpu@0 {
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2017-07-16 02:57:32 +08:00
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device_type = "cpu";
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2017-04-04 02:38:40 +08:00
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compatible = "arm,cortex-m0+";
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2017-07-16 02:57:32 +08:00
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reg = <0>;
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2017-04-04 02:38:40 +08:00
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};
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};
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sram0: memory {
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compatible = "mmio-sram";
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reg = <0x1FFFF000 0x4000>;
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};
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soc {
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flash0: flash@0 {
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reg = <0 0x20000>;
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};
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2017-07-11 23:38:09 +08:00
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i2c0: i2c@40066000 {
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compatible = "nxp,kinetis-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <8 0>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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compatible = "nxp,kinetis-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <9 0>;
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label = "I2C_1";
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status = "disabled";
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};
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2017-04-04 02:38:40 +08:00
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uart0: uart@4006A000 {
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compatible = "nxp,kinetis-lpsci";
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reg = <0x4006A000 0xc>;
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interrupts = <12 0>;
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2017-05-17 05:36:51 +08:00
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label = "UART_0";
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2017-04-04 02:38:40 +08:00
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status = "disabled";
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};
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2017-07-12 09:49:08 +08:00
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <15 0>;
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label = "ADC_0";
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status = "disabled";
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};
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2017-04-04 02:38:40 +08:00
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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