2018-03-27 18:17:40 +08:00
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4f";
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2018-09-18 20:50:37 +08:00
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reg = <0>;
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2018-03-27 18:17:40 +08:00
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};
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};
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flash0: flash {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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soc {
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uart0: uart@40010000 { /* USART0 */
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compatible = "silabs,efm32-usart";
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reg = <0x40010000 0x400>;
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interrupts = <11 0 12 0>;
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status = "disabled";
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label = "UART_0";
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};
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uart1: uart@40010400 { /* USART1 */
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compatible = "silabs,efm32-usart";
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reg = <0x40010400 0x400>;
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interrupts = <19 0 20 0>;
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status = "disabled";
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label = "UART_1";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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