2019-11-19 15:39:11 +08:00
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description: Xilinx ZynqMP PS TTC timer
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2018-11-18 15:28:49 +08:00
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dts: bindings: Fix xlnx,ttcps binding compat
The `xlnx,ttcps` binding, despite having the file name of
`xlnx,ttcps.yaml`, had the compatible property of `cdns,ttc`.
While it is true that the Xilinx ZynqMP platform embeds the Cadence
Triple Timer Counter (TTC) IP core, its TTC differs from the original
Cadence core in that it implements 32-bit counters, instead of the
16-bit counters defined in the original; hence, the Xilinx variant is
not compatible with the original Cadence version and should be treated
as a different device.
This commit changes the `xlnx,ttcps.yaml` compatible property to
`xlnx,ttcps` for the above reasons.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-18 12:45:28 +08:00
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compatible: "xlnx,ttcps"
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2019-08-20 02:32:25 +08:00
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2019-08-22 07:10:12 +08:00
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include: base.yaml
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2018-11-18 15:28:49 +08:00
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properties:
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label:
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2019-08-28 06:22:01 +08:00
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required: true
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2018-11-18 15:28:49 +08:00
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reg:
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2019-08-28 06:22:01 +08:00
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required: true
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2018-11-18 15:28:49 +08:00
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clock-frequency:
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type: int
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dts: bindings: Fix xlnx,ttcps binding compat
The `xlnx,ttcps` binding, despite having the file name of
`xlnx,ttcps.yaml`, had the compatible property of `cdns,ttc`.
While it is true that the Xilinx ZynqMP platform embeds the Cadence
Triple Timer Counter (TTC) IP core, its TTC differs from the original
Cadence core in that it implements 32-bit counters, instead of the
16-bit counters defined in the original; hence, the Xilinx variant is
not compatible with the original Cadence version and should be treated
as a different device.
This commit changes the `xlnx,ttcps.yaml` compatible property to
`xlnx,ttcps` for the above reasons.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-18 12:45:28 +08:00
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required: true
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2018-11-18 15:28:49 +08:00
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description: Clock frequency information for Timer operation
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