zephyr/boards/riscv/qemu_riscv32e/qemu_riscv32e.dts

23 lines
276 B
Plaintext
Raw Normal View History

/*
* Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*
*/
/dts-v1/;
#include <virt.dtsi>
/ {
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &ram0;
};
};
&uart0 {
status = "okay";
};