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zephyr/boards/riscv/icev_wireless/Kconfig.defconfig

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boards: riscv: add ICE-V Wireless board The ICE-V Wireless includes an ESP32-C3, an iCE40UP5k-SG48 FPGA, and an 8MB PSRAM connected directly to the FPGA. This change adds initial support for the ESP32-C3 RISC-V application processor. For more information, please see https://github.com/ICE-V-Wireless/ICE-V-Wireless Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2022-07-13 10:34:02 +08:00
# Copyright (c) 2022 Friedt Professional Engineering Services, Inc
# SPDX-License-Identifier: Apache-2.0
config BOARD
default "icev_wireless"
depends on BOARD_ICEV_WIRELESS
config HEAP_MEM_POOL_SIZE
boards: esp32: add default HEAP for all ESP32 boards In order to avoid missing k_malloc options, add default HEAP value for all boards. Fixes #54428 Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-02-03 22:40:07 +08:00
default 98304 if WIFI
boards: esp32xx: update BT heap of all espressif boards Current internal BT heap uses custom heap area, which reserves unused RAM area. In order to free up some RAM, BT HAL implementation was changed to use sysheap instead. With this change, something around ~13kb is now available for application, optmizing RAM usage. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-03-10 07:56:05 +08:00
default 40960 if BT
boards: esp32: add default HEAP for all ESP32 boards In order to avoid missing k_malloc options, add default HEAP value for all boards. Fixes #54428 Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-02-03 22:40:07 +08:00
default 4096
boards: riscv: add ICE-V Wireless board The ICE-V Wireless includes an ESP32-C3, an iCE40UP5k-SG48 FPGA, and an 8MB PSRAM connected directly to the FPGA. This change adds initial support for the ESP32-C3 RISC-V application processor. For more information, please see https://github.com/ICE-V-Wireless/ICE-V-Wireless Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2022-07-13 10:34:02 +08:00
choice BT_HCI_BUS_TYPE
boards: esp32: add default HEAP for all ESP32 boards In order to avoid missing k_malloc options, add default HEAP value for all boards. Fixes #54428 Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-02-03 22:40:07 +08:00
default BT_ESP32 if BT
boards: riscv: add ICE-V Wireless board The ICE-V Wireless includes an ESP32-C3, an iCE40UP5k-SG48 FPGA, and an 8MB PSRAM connected directly to the FPGA. This change adds initial support for the ESP32-C3 RISC-V application processor. For more information, please see https://github.com/ICE-V-Wireless/ICE-V-Wireless Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2022-07-13 10:34:02 +08:00
endchoice