2020-10-27 03:01:42 +08:00
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/*
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* Copyright (c) 2020 Teslabs Engineering S.L.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9488_H_
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#define ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9488_H_
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2022-05-06 16:25:46 +08:00
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#include <zephyr/device.h>
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2020-10-27 03:01:42 +08:00
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/* Commands/registers. */
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#define ILI9488_FRMCTR1 0xB1
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#define ILI9488_DISCTRL 0xB6
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#define ILI9488_PWCTRL1 0xC0
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#define ILI9488_PWCTRL2 0xC1
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#define ILI9488_VMCTRL 0xC5
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#define ILI9488_PGAMCTRL 0xE0
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#define ILI9488_NGAMCTRL 0xE1
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/* Commands/registers length. */
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#define ILI9488_FRMCTR1_LEN 2U
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#define ILI9488_DISCTRL_LEN 3U
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#define ILI9488_PWCTRL1_LEN 2U
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#define ILI9488_PWCTRL2_LEN 1U
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#define ILI9488_VMCTRL_LEN 4U
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#define ILI9488_PGAMCTRL_LEN 15U
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#define ILI9488_NGAMCTRL_LEN 15U
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/** X resolution (pixels). */
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#define ILI9488_X_RES 320U
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/** Y resolution (pixels). */
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#define ILI9488_Y_RES 480U
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/** ILI9488 registers to be initialized. */
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struct ili9488_regs {
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uint8_t frmctr1[ILI9488_FRMCTR1_LEN];
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uint8_t disctrl[ILI9488_DISCTRL_LEN];
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uint8_t pwctrl1[ILI9488_PWCTRL1_LEN];
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uint8_t pwctrl2[ILI9488_PWCTRL2_LEN];
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uint8_t vmctrl[ILI9488_VMCTRL_LEN];
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uint8_t pgamctrl[ILI9488_PGAMCTRL_LEN];
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uint8_t ngamctrl[ILI9488_NGAMCTRL_LEN];
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};
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/* Initializer macro for ILI9488 registers. */
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#define ILI9488_REGS_INIT(n) \
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static const struct ili9488_regs ili9xxx_regs_##n = { \
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.frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9488), frmctr1), \
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.disctrl = DT_PROP(DT_INST(n, ilitek_ili9488), disctrl), \
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.pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9488), pwctrl1), \
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.pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9488), pwctrl2), \
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.vmctrl = DT_PROP(DT_INST(n, ilitek_ili9488), vmctrl), \
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.pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9488), pgamctrl), \
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.ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9488), ngamctrl), \
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}
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/**
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* @brief Initialize ILI9488 registers with DT values.
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*
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* @param dev ILI9488 device instance
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* @return 0 on success, errno otherwise.
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*/
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int ili9488_regs_init(const struct device *dev);
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#endif /* ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9488_H_ */
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