2024-01-06 03:18:42 +08:00
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/*
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* Copyright 2024 Google LLC
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT microchip_mcp7940n
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#include <zephyr/device.h>
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#include <zephyr/drivers/emul.h>
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#include <zephyr/drivers/emul_bbram.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/i2c_emul.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_DECLARE(bbram_microchip_mcp7940n, CONFIG_BBRAM_LOG_LEVEL);
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#define MICROCHIP_MCP7940N_SRAM_OFFSET 0x20
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#define MICROCHIP_MCP7940N_SRAM_SIZE 64
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#define MICROCHIP_MCP7940N_RTCWKDAY_REGISTER_ADDRESS 0x03
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#define MICROCHIP_MCP7940N_RTCWKDAY_VBATEN_BIT BIT(3)
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#define MICROCHIP_MCP7940N_RTCWKDAY_PWRFAIL_BIT BIT(4)
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struct mcp7940n_emul_cfg {
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};
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struct mcp7940n_emul_data {
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uint8_t rtcwkday;
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uint8_t data[MICROCHIP_MCP7940N_SRAM_SIZE];
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};
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static int mcp7940n_emul_init(const struct emul *target, const struct device *parent)
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{
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ARG_UNUSED(target);
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ARG_UNUSED(parent);
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return 0;
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}
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static int mcp7940n_emul_transfer_i2c(const struct emul *target, struct i2c_msg *msgs, int num_msgs,
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int addr)
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{
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struct mcp7940n_emul_data *data = target->data;
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i2c_dump_msgs_rw(target->dev, msgs, num_msgs, addr, false);
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if (num_msgs < 1) {
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LOG_ERR("Invalid number of messages: %d", num_msgs);
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return -EIO;
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}
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if (FIELD_GET(I2C_MSG_READ, msgs->flags)) {
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LOG_ERR("Unexpected read");
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return -EIO;
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}
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if (msgs->len < 1) {
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LOG_ERR("Unexpected msg0 length %d", msgs->len);
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return -EIO;
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}
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uint8_t regn = msgs->buf[0];
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bool is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1;
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bool is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1;
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if (!is_stop && !is_read) {
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/* First message was a write with the register number, check next message */
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msgs++;
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is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1;
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is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1;
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}
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if (is_read) {
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/* Read data */
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if (regn == MICROCHIP_MCP7940N_RTCWKDAY_REGISTER_ADDRESS) {
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msgs->buf[0] = data->rtcwkday;
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return 0;
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}
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if (regn >= MICROCHIP_MCP7940N_SRAM_OFFSET &&
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regn + msgs->len <=
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MICROCHIP_MCP7940N_SRAM_OFFSET + MICROCHIP_MCP7940N_SRAM_SIZE) {
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for (int i = 0; i < msgs->len; ++i) {
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msgs->buf[i] =
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data->data[regn + i - MICROCHIP_MCP7940N_SRAM_OFFSET];
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}
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return 0;
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}
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} else {
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/* Write data */
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if (regn == MICROCHIP_MCP7940N_RTCWKDAY_REGISTER_ADDRESS) {
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data->rtcwkday = msgs->buf[1];
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return 0;
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}
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if (regn >= MICROCHIP_MCP7940N_SRAM_OFFSET &&
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regn + msgs->len - 1 <=
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MICROCHIP_MCP7940N_SRAM_OFFSET + MICROCHIP_MCP7940N_SRAM_SIZE) {
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for (int i = 0; i < msgs->len; ++i) {
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data->data[regn + i - MICROCHIP_MCP7940N_SRAM_OFFSET] =
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msgs->buf[1 + i];
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}
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return 0;
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}
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}
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return -EIO;
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}
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static const struct i2c_emul_api mcp7940n_emul_api_i2c = {
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.transfer = mcp7940n_emul_transfer_i2c,
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};
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static int mcp7940n_emul_backend_set_data(const struct emul *target, size_t offset, size_t count,
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const uint8_t *buffer)
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{
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struct mcp7940n_emul_data *data = target->data;
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if (offset + count > MICROCHIP_MCP7940N_SRAM_SIZE) {
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return -ERANGE;
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}
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for (size_t i = 0; i < count; ++i) {
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data->data[offset + i] = buffer[i];
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}
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return 0;
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}
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static int mcp7940n_emul_backend_get_data(const struct emul *target, size_t offset, size_t count,
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uint8_t *buffer)
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{
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struct mcp7940n_emul_data *data = target->data;
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if (offset + count > MICROCHIP_MCP7940N_SRAM_SIZE) {
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return -ERANGE;
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}
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for (size_t i = 0; i < count; ++i) {
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buffer[i] = data->data[offset + i];
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}
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return 0;
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}
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2024-05-01 17:34:17 +08:00
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static const struct emul_bbram_driver_api mcp7940n_emul_backend_api = {
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2024-01-06 03:18:42 +08:00
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.set_data = mcp7940n_emul_backend_set_data,
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.get_data = mcp7940n_emul_backend_get_data,
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};
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#define MCP7940N_EMUL(inst) \
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static const struct mcp7940n_emul_cfg mcp7940n_emul_cfg_##inst; \
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static struct mcp7940n_emul_data mcp7940n_emul_data_##inst; \
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EMUL_DT_INST_DEFINE(inst, mcp7940n_emul_init, &mcp7940n_emul_data_##inst, \
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&mcp7940n_emul_cfg_##inst, &mcp7940n_emul_api_i2c, \
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&mcp7940n_emul_backend_api)
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DT_INST_FOREACH_STATUS_OKAY(MCP7940N_EMUL)
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