zephyr/arch/xtensa/soc/sample_controller/Kconfig.soc

# Copyright (c) 2017 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

config SOC_XTENSA_SAMPLE_CONTROLLER
	bool "Xtensa sample_controller core"
xtensa: build similar to other Zephyr arches * CONFIG_SOC is now properly set and we do not need a separate XTENSA_CORE build variable * Some unnecessary macro -D CFLAGS in the Xtensa Makefile removed * There is no default SOC selection, it is now done explicitly in the board's defconfig * CONFIG_<board name> now renamed to CONFIG_SOC_<board name in uppercase> to conform to established style. Issue: ZEP-1711 Change-Id: I88997530db09970b7fdd1c3e3d355bfca9d0be1a Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> 2017-04-12 06:10:00 +08:00			`# Copyright (c) 2017 Intel Corporation`
			`# SPDX-License-Identifier: Apache-2.0`

xtensa: rename SOC_SAMPLE_CONTROLLER SOC_SAMPLE_CONTROLLER option name is too generic, make it Xtensa specific to avoid confusion. Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2017-05-12 05:46:49 +08:00			`config SOC_XTENSA_SAMPLE_CONTROLLER`
			`bool "Xtensa sample_controller core"`
xtensa: build similar to other Zephyr arches * CONFIG_SOC is now properly set and we do not need a separate XTENSA_CORE build variable * Some unnecessary macro -D CFLAGS in the Xtensa Makefile removed * There is no default SOC selection, it is now done explicitly in the board's defconfig * CONFIG_<board name> now renamed to CONFIG_SOC_<board name in uppercase> to conform to established style. Issue: ZEP-1711 Change-Id: I88997530db09970b7fdd1c3e3d355bfca9d0be1a Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> 2017-04-12 06:10:00 +08:00