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zephyr/boards/arc/nsim/nsim_hs_smp.dts

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board/nsim: Add support of multi-core ARC HS platform in nSIM Now when SMP support for ARC is available we may introduce a simulation platform which might be used for testing & development for SMP setups. One important note is stand-alone nSIM (as well as its "Free" flavour) doesn't support SMP simulation so we have to switch to use of nSIM via proprietary MetaWare debugger [1] and so: 1. We introduce new emulation target "mdb" 2. It's only possible to run that platform for those who have MetaWare tools installed and valid license. Though QEMU port for ARC is in work at the moment and once we open that port and it has SMP support we'll switch to it and everybody will be able to try ARC HS with SMP. [1] https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-25 19:49:59 +08:00
/*
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include "nsim.dtsi"
ARC: boards: nSIM: memory layout overhaul Currently we use incorrect memory layout for SMP boards as we put data (which need do be accessible from all cores) to DCCM which is private for each CPU core. This works for nSIM which doesn't simulate CCMs (as we don't pass corresponding nSIM options for SMP configurations) however it won't work if we run that code on real HW (we want to achieve that nSIM configurations are also runnable on HAPS - FPGA platform). Let's fix that issue by using DDR instead of CCMs for SMP configurations (nsim_hs_smp and nsim_hs6x_smp). While I'm at it - switch UP HS6x configuration (nsim_hs6x) for DDR usage instead of CCMs - to make that configuration closer to the HAPS config we have. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-05-02 23:24:41 +08:00
#include "nsim-flat-mem.dtsi"
board/nsim: Add support of multi-core ARC HS platform in nSIM Now when SMP support for ARC is available we may introduce a simulation platform which might be used for testing & development for SMP setups. One important note is stand-alone nSIM (as well as its "Free" flavour) doesn't support SMP simulation so we have to switch to use of nSIM via proprietary MetaWare debugger [1] and so: 1. We introduce new emulation target "mdb" 2. It's only possible to run that platform for those who have MetaWare tools installed and valid license. Though QEMU port for ARC is in work at the moment and once we open that port and it has SMP support we'll switch to it and everybody will be able to try ARC HS with SMP. [1] https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-25 19:49:59 +08:00
/ {
model = "snps,nsim_hs";
compatible = "snps,nsim_hs";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "snps,archs";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "snps,archs";
reg = <1>;
};
};
};