2021-02-07 22:47:52 +08:00
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/*
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* Copyright (c) 2020 Alexander Wachter
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#ifndef ZEPHYR_DRIVERS_CAN_STM32FD_H_
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#define ZEPHYR_DRIVERS_CAN_STM32FD_H_
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#include "can_mcan.h"
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2021-06-10 21:55:31 +08:00
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#include <pinmux/pinmux_stm32.h>
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2021-02-07 22:47:52 +08:00
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#define DEV_DATA(dev) ((struct can_stm32fd_data *)(dev)->data)
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#define DEV_CFG(dev) ((const struct can_stm32fd_config *)(dev)->config)
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struct can_stm32fd_config {
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struct can_mcan_msg_sram *msg_sram;
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void (*config_irq)(void);
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struct can_mcan_config mcan_cfg;
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/* CAN always has an RX and TX pin. Hence, hardcode it to two*/
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const struct soc_gpio_pinctrl pinctrl[2];
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};
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struct can_stm32fd_data {
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struct can_mcan_data mcan_data;
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};
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#endif /*ZEPHYR_DRIVERS_CAN_STM32FD_H_*/
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