zephyr/soc/riscv32/riscv-privilege/miv/dts_fixup.h

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/* SPDX-License-Identifier: Apache-2.0 */
/* PLIC */
#define DT_PLIC_MAX_PRIORITY \
DT_RISCV_PLIC0_40000000_RISCV_MAX_PRIORITY
#define DT_PLIC_PRIO_BASE_ADDR \
DT_RISCV_PLIC0_40000000_PRIO_BASE_ADDRESS
#define DT_PLIC_IRQ_EN_BASE_ADDR \
DT_RISCV_PLIC0_40000000_IRQ_EN_BASE_ADDRESS
#define DT_PLIC_REG_BASE_ADDR \
DT_RISCV_PLIC0_40000000_REG_BASE_ADDRESS
/* UART 0 */
#define DT_MIV_UART_0_BASE_ADDR DT_MICROSEMI_COREUART_70001000_BASE_ADDRESS
#define DT_MIV_UART_0_CLOCK_FREQUENCY DT_MICROSEMI_COREUART_70001000_CLOCK_FREQUENCY
#define DT_MIV_UART_0_BAUD_RATE DT_MICROSEMI_COREUART_70001000_CURRENT_SPEED
#define DT_MIV_UART_0_NAME DT_MICROSEMI_COREUART_70001000_LABEL