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zephyr/soc/riscv32/riscv-privilege/miv/Kconfig.defconfig.series

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license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 21:08:09 +08:00
# SPDX-License-Identifier: Apache-2.0
riscv32: riscv-privilege: Microsemi Mi-V support This commit adds support for Microsemi Mi-V RISC-V softcore CPU running on the M2GL025 IGLOO2 FPGA development board. signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-11 01:02:14 +08:00
if SOC_SERIES_RISCV32_MIV
config SOC_SERIES
string
default "miv"
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 660000
config RISCV_SOC_INTERRUPT_INIT
bool
default y
config RISCV_HAS_CPU_IDLE
bool
default y
config RISCV_HAS_PLIC
bool
default y
config NUM_IRQS
int
default 42
config XIP
bool
default y
endif # SOC_SERIES_RISCV32_MIV