OrgZephyr/zephyr
OrgZephyr
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr.git
1
0
Fork 0
Code Issues Releases Wiki Activity
zephyr/drivers/serial/Kconfig.qmsi

67 lines
1.4 KiB
Plaintext
Raw Normal View History

uart: Introduce QMSI shim driver This patch introduces the QMSI UART driver which is simply a shim driver based on UART driver provided by QMSI BSP. This initial version implements only the mandatory APIs 'poll_in', 'poll_out' and 'err_check' which are required by trivial sample apps and by output functionality from the console driver. The remaining APIs will be implemented by up coming patches. The driver supports only 115200 baud rate at the moment. In order to enable this driver, the following options should be set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory" CONFIG_SERIAL=y CONFIG_UART_QMSI=y This driver has been tested with Quark SE Devboard so this patch also adds its platform-specific default configuration options to 'arch/x86/ soc/quark_se/Kconfig'. Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-27 01:51:28 +08:00
menuconfig UART_QMSI
qmsi: uart: use built-in qmsi driver Change-Id: Ie19aee8dad8ba082891f92a2d42dc71f4ac34dbe Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-17 09:02:30 +08:00
depends on QMSI
uart: Introduce QMSI shim driver This patch introduces the QMSI UART driver which is simply a shim driver based on UART driver provided by QMSI BSP. This initial version implements only the mandatory APIs 'poll_in', 'poll_out' and 'err_check' which are required by trivial sample apps and by output functionality from the console driver. The remaining APIs will be implemented by up coming patches. The driver supports only 115200 baud rate at the moment. In order to enable this driver, the following options should be set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory" CONFIG_SERIAL=y CONFIG_UART_QMSI=y This driver has been tested with Quark SE Devboard so this patch also adds its platform-specific default configuration options to 'arch/x86/ soc/quark_se/Kconfig'. Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-27 01:51:28 +08:00
bool "QMSI UART driver"
default n
select SERIAL_HAS_DRIVER
help
This option enables the QMSI UART driver.
This driver is simply a shim driver based on the UART driver
qmsi: uart: use built-in qmsi driver Change-Id: Ie19aee8dad8ba082891f92a2d42dc71f4ac34dbe Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-17 09:02:30 +08:00
provided by the QMSI BSP.
uart: Introduce QMSI shim driver This patch introduces the QMSI UART driver which is simply a shim driver based on UART driver provided by QMSI BSP. This initial version implements only the mandatory APIs 'poll_in', 'poll_out' and 'err_check' which are required by trivial sample apps and by output functionality from the console driver. The remaining APIs will be implemented by up coming patches. The driver supports only 115200 baud rate at the moment. In order to enable this driver, the following options should be set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory" CONFIG_SERIAL=y CONFIG_UART_QMSI=y This driver has been tested with Quark SE Devboard so this patch also adds its platform-specific default configuration options to 'arch/x86/ soc/quark_se/Kconfig'. Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-27 01:51:28 +08:00
config UART_QMSI_0
depends on UART_QMSI
bool "Enable UART 0 controller"
default n
config UART_QMSI_0_NAME
depends on UART_QMSI_0
string "UART_0 device name"
default "UART_0"
help
This option holds the UART_0 device name. If unsure, use the
default name.
uart: qmsi: Add baud rate configuration support This patch extends the UART QMSI driver so it supports different baud rate configurations. The baud rate is set per UART controller via menuconfig. The default baud rate is 115200. Change-Id: Iad736d72bd309b8a33ab5d538251fce374e89fd2 Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-01 22:25:43 +08:00
config UART_QMSI_0_BAUDRATE
depends on UART_QMSI_0
int "UART_0 baud rate"
default 115200
help
This option sets the baud rate from the UART_0 device.
drivers: uart_qmsi: Re-enable HW FC for arduino_101 & quark_se_devboard On current Curie-based boards UART 0 is wired to the nRF51 BLE controller and requires HW flow control to be enabled in order to function. This patch restores the same behavior that was present before the "qmsi: uart: use built-in qmsi driver" patch. Change-Id: If7ea347f5ab8b460f39123dcc0d75d711a5a1c2a Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-04-25 17:44:35 +08:00
config UART_QMSI_0_HW_FC
depends on UART_QMSI_0
bool "HW flow control for UART_0 controller"
uart: qmsi: Add support for IRQ APIs This patch extends the UART QMSI driver so it supports the IRQ APIs from include/uart.h. The IRQ APIs are enabled by the 'CONFIG_UART_INTERRUPT_ DRIVEN' option. Differently from others APIs such as I2C and SPI, the UART API is very low level. For that reason, the IRQ facilities (e.g. irq based transfers) from the QMSI driver are not useful to the shim driver at the moment. In order to implement the IRQ APIs we rely on UART registers defined by QMSI. QMSI UART header is missing some macro definitions from IRR register so we define them in the shim driver. Since the IRQ trigger condition is not configurable in the QMSI shim driver, this patch also changes drivers/serial/Kconfig so the "UART IRQ Trigger Condition" choice doesn't appear on the menu if the QMSI driver is selected. Change-Id: Idf9a0f6a47af2a550a31f474d721068dca989713 Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-03 06:19:59 +08:00
config UART_QMSI_0_IRQ_PRI
depends on UART_QMSI_0
int "IRQ priority from UART_0 controller"
uart: Introduce QMSI shim driver This patch introduces the QMSI UART driver which is simply a shim driver based on UART driver provided by QMSI BSP. This initial version implements only the mandatory APIs 'poll_in', 'poll_out' and 'err_check' which are required by trivial sample apps and by output functionality from the console driver. The remaining APIs will be implemented by up coming patches. The driver supports only 115200 baud rate at the moment. In order to enable this driver, the following options should be set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory" CONFIG_SERIAL=y CONFIG_UART_QMSI=y This driver has been tested with Quark SE Devboard so this patch also adds its platform-specific default configuration options to 'arch/x86/ soc/quark_se/Kconfig'. Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-27 01:51:28 +08:00
config UART_QMSI_1
depends on UART_QMSI
bool "Enable UART 1 controller"
default n
config UART_QMSI_1_NAME
depends on UART_QMSI_1
string "UART_1 device name"
default "UART_1"
help
This option holds the UART_1 device name. If unsure, use the
default name.
uart: qmsi: Add baud rate configuration support This patch extends the UART QMSI driver so it supports different baud rate configurations. The baud rate is set per UART controller via menuconfig. The default baud rate is 115200. Change-Id: Iad736d72bd309b8a33ab5d538251fce374e89fd2 Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-01 22:25:43 +08:00
config UART_QMSI_1_BAUDRATE
depends on UART_QMSI_1
int "UART_1 baud rate"
default 115200
help
uart: qmsi: Add support for IRQ APIs This patch extends the UART QMSI driver so it supports the IRQ APIs from include/uart.h. The IRQ APIs are enabled by the 'CONFIG_UART_INTERRUPT_ DRIVEN' option. Differently from others APIs such as I2C and SPI, the UART API is very low level. For that reason, the IRQ facilities (e.g. irq based transfers) from the QMSI driver are not useful to the shim driver at the moment. In order to implement the IRQ APIs we rely on UART registers defined by QMSI. QMSI UART header is missing some macro definitions from IRR register so we define them in the shim driver. Since the IRQ trigger condition is not configurable in the QMSI shim driver, this patch also changes drivers/serial/Kconfig so the "UART IRQ Trigger Condition" choice doesn't appear on the menu if the QMSI driver is selected. Change-Id: Idf9a0f6a47af2a550a31f474d721068dca989713 Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-03 06:19:59 +08:00
This option sets the baud rate from the UART_1 device.
drivers: uart_qmsi: Re-enable HW FC for arduino_101 & quark_se_devboard On current Curie-based boards UART 0 is wired to the nRF51 BLE controller and requires HW flow control to be enabled in order to function. This patch restores the same behavior that was present before the "qmsi: uart: use built-in qmsi driver" patch. Change-Id: If7ea347f5ab8b460f39123dcc0d75d711a5a1c2a Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-04-25 17:44:35 +08:00
config UART_QMSI_1_HW_FC
depends on UART_QMSI_1
bool "HW flow control for UART_1 controller"
uart: qmsi: Add support for IRQ APIs This patch extends the UART QMSI driver so it supports the IRQ APIs from include/uart.h. The IRQ APIs are enabled by the 'CONFIG_UART_INTERRUPT_ DRIVEN' option. Differently from others APIs such as I2C and SPI, the UART API is very low level. For that reason, the IRQ facilities (e.g. irq based transfers) from the QMSI driver are not useful to the shim driver at the moment. In order to implement the IRQ APIs we rely on UART registers defined by QMSI. QMSI UART header is missing some macro definitions from IRR register so we define them in the shim driver. Since the IRQ trigger condition is not configurable in the QMSI shim driver, this patch also changes drivers/serial/Kconfig so the "UART IRQ Trigger Condition" choice doesn't appear on the menu if the QMSI driver is selected. Change-Id: Idf9a0f6a47af2a550a31f474d721068dca989713 Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-03 06:19:59 +08:00
config UART_QMSI_1_IRQ_PRI
depends on UART_QMSI_1
qmsi: uart: use built-in qmsi driver Change-Id: Ie19aee8dad8ba082891f92a2d42dc71f4ac34dbe Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-17 09:02:30 +08:00
int "IRQ priority from UART_1 controller"