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boards: doc: Add information about generating litex_vexriscv SoC This commit adds more information about the litex_vexrscv board target, including references to related projects and instruction about generating bitstream for the Digilent Arty A7-35T Board. Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2020-12-02 22:06:49 +08:00
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