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zephyr/soc/arm/microchip_mec/mec1501/soc.h

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soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
/*
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __MEC_SOC_H
#define __MEC_SOC_H
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(48)
#ifndef _ASMLANGUAGE
#include "MEC1501hsz.h"
#include "regaccess.h"
soc : microchip_mec : Add gpio driver common definitions Macros and enums are included for supporting pin configuration settings. Entries to the dts_fixup were also included in order to configure port level settings. Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-04-10 16:45:16 +08:00
#include "../common/soc_gpio.h"
#include "../common/soc_pins.h"
soc: microchip_mec: Add header for extracting eSPI data This header contains encoding offsets for all the eSPI channels which communicate data from/to the host. Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-10-22 02:26:49 +08:00
#include "../common/soc_espi_channels.h"
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
#endif
#endif