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zephyr/soc/arm/aspeed/ast10x0/Kconfig.series

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soc: arm: Add Aspeed ast10x0 series support Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This processor operates at 200MHz and executes on SRAM. This patch adds support for ast1030 as the first SoC of this series which is targeted but not limited at the bridge IC in a server system. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
2021-11-26 17:21:31 +08:00
# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2021 ASPEED Technology Inc.
config SOC_SERIES_AST10X0
bool "Aspeed AST10X0 Series"
select ARM
select CPU_CORTEX_M4
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_FAMILY_ASPEED
soc: arm: select SYSCON for Aspeed AST10x0 series SOC Aspeed AST10x0 series SOC has a SYSCON hardware block at address 0x7e6e2000. Enable this option to enable relative driver. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-05-16 10:12:21 +08:00
select SYSCON
soc: arm: Add Aspeed ast10x0 series support Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This processor operates at 200MHz and executes on SRAM. This patch adds support for ast1030 as the first SoC of this series which is targeted but not limited at the bridge IC in a server system. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
2021-11-26 17:21:31 +08:00
select CACHE
arch: arm: Fix cache-related Kconfig symbols Switch to the new cache-related Kconfig symbols. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-25 16:42:32 +08:00
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
soc: arm: Add Aspeed ast10x0 series support Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This processor operates at 200MHz and executes on SRAM. This patch adds support for ast1030 as the first SoC of this series which is targeted but not limited at the bridge IC in a server system. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
2021-11-26 17:21:31 +08:00
select CACHE_MANAGEMENT
soc: arm: select CACHE_ASPEED for Aspeed AST10x0 series SOC Select CACHE_ASPEED to enable Aspeed cache driver for AST10x0 series SOC. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-05-13 15:27:32 +08:00
select CACHE_ASPEED
soc: arm: Add Aspeed ast10x0 series support Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This processor operates at 200MHz and executes on SRAM. This patch adds support for ast1030 as the first SoC of this series which is targeted but not limited at the bridge IC in a server system. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
2021-11-26 17:21:31 +08:00
help
Enable support for ASPEED AST10X0 series