2017-04-05 04:19:13 +08:00
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/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Per-arch thread definition
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*
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2017-10-18 06:55:47 +08:00
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* This file contains definitions for
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2017-04-05 04:19:13 +08:00
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*
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* struct _thread_arch
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* struct _callee_saved
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* struct _caller_saved
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*
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* necessary to instantiate instances of struct k_thread.
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*/
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#ifndef _kernel_arch_thread_h_
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#define _kernel_arch_thread_h_
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#ifndef _ASMLANGUAGE
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#include <zephyr/types.h>
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struct _caller_saved {
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/*
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* Unused for Cortex-M, which automatically saves the necessary
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* registers in its exception stack frame.
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*
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* For Cortex-A, this may be:
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*
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* u32_t a1; // r0
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* u32_t a2; // r1
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* u32_t a3; // r2
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* u32_t a4; // r3
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* u32_t ip; // r12
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* u32_t lr; // r14
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* u32_t pc; // r15
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* u32_t xpsr;
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*/
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};
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typedef struct _caller_saved _caller_saved_t;
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struct _callee_saved {
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u32_t v1; /* r4 */
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u32_t v2; /* r5 */
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u32_t v3; /* r6 */
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u32_t v4; /* r7 */
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u32_t v5; /* r8 */
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u32_t v6; /* r9 */
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u32_t v7; /* r10 */
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u32_t v8; /* r11 */
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u32_t psp; /* r13 */
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};
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typedef struct _callee_saved _callee_saved_t;
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#ifdef CONFIG_FLOAT
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struct _preempt_float {
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float s16;
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float s17;
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float s18;
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float s19;
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float s20;
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float s21;
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float s22;
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float s23;
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float s24;
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float s25;
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float s26;
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float s27;
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float s28;
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float s29;
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float s30;
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float s31;
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};
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#endif
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struct _thread_arch {
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/* interrupt locking key */
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u32_t basepri;
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/* r0 in stack frame cannot be written to reliably */
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u32_t swap_return_value;
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#ifdef CONFIG_FLOAT
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/*
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* No cooperative floating point register set structure exists for
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* the Cortex-M as it automatically saves the necessary registers
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* in its exception stack frame.
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*/
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struct _preempt_float preempt_float;
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#endif
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2017-12-09 02:22:49 +08:00
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#ifdef CONFIG_USERSPACE
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u32_t mode;
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u32_t priv_stack_start;
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u32_t priv_stack_size;
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#endif
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2017-04-05 04:19:13 +08:00
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};
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typedef struct _thread_arch _thread_arch_t;
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#endif /* _ASMLANGUAGE */
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#endif /* _kernel_arch_thread__h_ */
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