2022-09-05 18:12:52 +08:00
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/*
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* Copyright (c) 2022 AVSystem Sławomir Wolf Sp.j. (AVSystem)
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
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#include <dt-bindings/pinctrl/esp32-pinctrl.h>
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#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
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&pinctrl {
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uart0_tx_gpio1: uart0_tx_gpio1 {
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pinmux = <UART0_TX_GPIO1>;
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2023-05-11 10:19:02 +08:00
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output-high;
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2022-09-05 18:12:52 +08:00
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};
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uart0_rx_gpio3: uart0_rx_gpio3 {
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pinmux = <UART0_RX_GPIO3>;
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bias-pull-up;
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};
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spim2_miso_gpio12: spim2_miso_gpio12 {
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pinmux = <SPIM2_MISO_GPIO12>;
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};
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spim2_mosi_gpio11: spim2_mosi_gpio11 {
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pinmux = <SPIM2_MOSI_GPIO11>;
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output-low;
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};
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spim2_sclk_gpio14: spim2_sclk_gpio14 {
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pinmux = <SPIM2_SCLK_GPIO14>;
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};
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spim2_csel_gpio16: spim2_csel_gpio16 {
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pinmux = <SPIM2_CSEL_GPIO16>;
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};
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spim3_miso_gpio25: spim3_miso_gpio25 {
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pinmux = <SPIM3_MISO_GPIO25>;
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};
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spim3_mosi_gpio15: spim3_mosi_gpio15 {
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pinmux = <SPIM3_MOSI_GPIO15>;
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output-low;
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};
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spim3_sclk_gpio13: spim3_sclk_gpio13 {
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pinmux = <SPIM3_SCLK_GPIO13>;
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};
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spim3_csel_gpio5: spim3_csel_gpio5 {
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pinmux = <SPIM3_CSEL_GPIO5>;
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};
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i2c0_sda_gpio21: i2c0_sda_gpio21 {
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pinmux = <I2C0_SDA_GPIO21>;
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bias-pull-up;
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drive-open-drain;
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output-high;
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};
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i2c0_scl_gpio22: i2c0_scl_gpio22 {
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pinmux = <I2C0_SCL_GPIO22>;
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bias-pull-up;
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drive-open-drain;
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output-high;
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};
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};
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