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zephyr/drivers/dma/Kconfig.stm32

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kconfig: Fix up newly-introduced copy-pasted headers Same deal as in https://github.com/zephyrproject-rtos/zephyr/pull/20280, for newly-introduced stuff. Will avoid failures with the new CI test in https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only checks changed files. Also fix some un-indented properties on choices. Choice properties work the same as symbol properties syntactically. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-18 19:01:42 +08:00
# DMA configuration options
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
# Copyright (c) 2016 Intel Corporation
# Copyright (c) 2019 Song Qiang <songqiang1304521@gmail.com>
# SPDX-License-Identifier: Apache-2.0
drivers/dma: stm32: Base Konfig symbols on dts compatible status In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32 symbols, set them directly based on related compatible status. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-08 03:39:55 +08:00
DT_COMPAT_ST_STM32_DMA_V1 := st,stm32-dma-v1
DT_COMPAT_ST_STM32_DMA_V2 := st,stm32-dma-v2
drivers: dma: stm32 dma driver for a new dma version This is the dma V2bis which is particular DMA V2 instance for stm32F1 and STM32L1 soc series. This DMA does not use the dma slot Otherwise it is similar to version V2. Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-04-28 20:37:47 +08:00
DT_COMPAT_ST_STM32_DMA_V2BIS := st,stm32-dma-v2bis
drivers/dma: stm32: Base Konfig symbols on dts compatible status In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32 symbols, set them directly based on related compatible status. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-08 03:39:55 +08:00
DT_COMPAT_ST_STM32_DMAMUX := st,stm32-dmamux
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
config DMA_STM32
bool "Enable STM32 DMA driver"
drivers: dma: stm32: refactor irq handling - Remove the need for kmalloc - On hardware that supports it use 1 IRQ handler per stream to determine the stream ID, so the ISR does not have to loop over all ID's to see which one is active. On hardware (like STM32L0 and STM32F0) where up to 7 streams share 3 IRQ's use the loop to check which stream is active. Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2020-08-22 05:50:00 +08:00
select USE_STM32_LL_DMA
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
depends on SOC_FAMILY_STM32
help
DMA driver for STM32 series SoCs.
if DMA_STM32
config DMA_STM32_V1
bool
drivers/dma: stm32: Base Konfig symbols on dts compatible status In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32 symbols, set them directly based on related compatible status. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-08 03:39:55 +08:00
default y if $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMA_V1))
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
help
drivers/dma: stm32: Base Konfig symbols on dts compatible status In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32 symbols, set them directly based on related compatible status. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-08 03:39:55 +08:00
Enable DMA V1 support.
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
config DMA_STM32_V2
bool
drivers: dma: stm32 dma driver for a new dma version This is the dma V2bis which is particular DMA V2 instance for stm32F1 and STM32L1 soc series. This DMA does not use the dma slot Otherwise it is similar to version V2. Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-04-28 20:37:47 +08:00
default y if $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMA_V2)) \
|| $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMA_V2BIS))
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
help
drivers: dma: stm32 dma driver for a new dma version This is the dma V2bis which is particular DMA V2 instance for stm32F1 and STM32L1 soc series. This DMA does not use the dma slot Otherwise it is similar to version V2. Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-04-28 20:37:47 +08:00
Enable DMA V2 or DMA V2bis support. With the versions V2 of DMA, the
peripheral request must be specified in the dma slot of the dma cell
With the versions V2 bis of DMA, the peripheral request (slot) is not
a parameter of the dma-cell.
drivers: dma: Enable dma and dmamux on stm32 This patch prepares the dma and introduces the dmamux on soc series which supports this feature for memory/periph transfers. Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-04-23 17:38:06 +08:00
config DMAMUX_STM32
bool
drivers/dma: stm32: Base Konfig symbols on dts compatible status In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32 symbols, set them directly based on related compatible status. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-08 03:39:55 +08:00
default $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMAMUX))
drivers: dma: Enable dma and dmamux on stm32 This patch prepares the dma and introduces the dmamux on soc series which supports this feature for memory/periph transfers. Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-04-23 17:38:06 +08:00
help
drivers/dma: stm32: Base Konfig symbols on dts compatible status In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32 symbols, set them directly based on related compatible status. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-08 03:39:55 +08:00
Enable DMAMUX support.
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
drivers: dma: stm32: refactor irq handling - Remove the need for kmalloc - On hardware that supports it use 1 IRQ handler per stream to determine the stream ID, so the ISR does not have to loop over all ID's to see which one is active. On hardware (like STM32L0 and STM32F0) where up to 7 streams share 3 IRQ's use the loop to check which stream is active. Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2020-08-22 05:50:00 +08:00
config DMA_STM32_SHARED_IRQS
bool
default y
drivers/dma: stm32: add support for stm32g0 series Update the existing driver to support STM32G0 series. It enables the DMA_STM32_SHARED_IRQS flag for g0 series, such that all interrupts are handled in a shared isr to avoid irq conflicts. The shared isr is extended to be able to handle irqs from more than one dma instance. Furthermore the config_irq function of instance 1, which connects to the irqs, was reworked to avoid irq conflicts when 2 dma instances on stm32f0, or stm32g0 are enabled: While dma1 has one exclusive irq for channel 1, and one irq for dma1 channels 2 and 3, all other channels share the same irq. Therefore it is currently not possible to enable dma2 without enabling dma1 at the same time, without getting an build errror due to an irq conflict. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-03-17 23:05:42 +08:00
depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32G0X || SOC_SERIES_STM32L0X
drivers: dma: stm32: refactor irq handling - Remove the need for kmalloc - On hardware that supports it use 1 IRQ handler per stream to determine the stream ID, so the ISR does not have to loop over all ID's to see which one is active. On hardware (like STM32L0 and STM32F0) where up to 7 streams share 3 IRQ's use the loop to check which stream is active. Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2020-08-22 05:50:00 +08:00
help
Enable shared IRQ support on devices where channels share 1 IRQ.
drivers: dma: add generic driver support for some series of stm32 This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4 series stm32. Notice due to some bugs, this is currently not working with f7. There are two kinds of IP blocks are used across these stm32, one is the one that has been used on F2/F4/F7 series, and the other one is the one that has been used on F0/F1/F3/L0/L4 series. Memory to memory transfer is only supported on the second DMA on F2/F4 with 'st,mem2mem' to be declared in dts. This driver depends on k_malloc to allocate memory for stream instances, so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them. Common parts of the driver are in dma_stm32.c and SoC related parts are implemented in dma_stm32_v*.c. This driver has been tested on multiple nucleo boards, including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the loop_transfer and chan_blen_transfer test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-10-24 19:06:19 +08:00
endif # DMA_STM32