zephyr/soc/riscv/riscv-ite/it8xxx2/Kconfig.series

# Copyright (c) 2020 ITE Corporation. All Rights Reserved.
# SPDX-License-Identifier: Apache-2.0

config SOC_SERIES_RISCV32_IT8XXX2
	bool "ITE IT8XXX2 implementation"
	#depends on RISCV
	select COMPRESSED_ISA
	select SOC_FAMILY_RISCV_ITE
	help
	    Enable support for ITE IT8XXX2
soc/riscv: it8xxx2 soc system A new platform soc for it8xxx2. Revising the test/kernel/context/src/main.c for it8xxx2 test case. Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw> 2020-09-09 16:45:45 +08:00			`# Copyright (c) 2020 ITE Corporation. All Rights Reserved.`
			`# SPDX-License-Identifier: Apache-2.0`

			`config SOC_SERIES_RISCV32_IT8XXX2`
			`bool "ITE IT8XXX2 implementation"`
			`#depends on RISCV`
soc: riscv: enable COMPRESSED_ISA for ITE chips Enable the config of COMPRESSED_ISA, this can work fine on 32-bit architecture. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com> 2021-03-19 17:27:03 +08:00			`select COMPRESSED_ISA`
soc/riscv: it8xxx2 soc system A new platform soc for it8xxx2. Revising the test/kernel/context/src/main.c for it8xxx2 test case. Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw> 2020-09-09 16:45:45 +08:00			`select SOC_FAMILY_RISCV_ITE`
			`help`
			`Enable support for ITE IT8XXX2`