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zephyr/soc/arm/nxp_imx/mcimx7_m4/Kconfig.series

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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 20:45:29 +08:00
# iMX7 M4 core series
arch: Add imx7d m4 soc support The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual Cortex A7 core and Single Cortex M4 core. Zephyr was ported to run on the M4 core. In a later release, it will also communicate with the A7 core (running Linux) via RPmsg. The low level drivers come from NXP FreeRTOS BSP and are located at ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README The A7 core is responsible to load the M4 binary application into the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at bootloader level after the Linux system has booted. The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4: +---------------+-----------------+---------------------------+ | Memory Name | Start Address | Size | +===============+=================+===========================+ | TCML | 0x007F8000 | 32KB | +---------------+-----------------+---------------------------+ | TCMU | 0x20000000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM_S | 0x20180000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM | 0x00900000 | 128KB | +---------------+-----------------+---------------------------+ | DDR | 0x10000000 | 256MB | +---------------+-----------------+---------------------------+ Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-03-16 21:59:33 +08:00
# Copyright (c) 2017, NXP
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_IMX7_M4
bool "i.MX7 M4 Core Series"
kconfig: Remove assignments to CONFIG_<arch> syms and hide them All board defconfig files currently set the architecture in addition to the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up defconfig files. CONFIG_<arch> symbols currently being set in configuration files also means that they are configurable (can be changed in menuconfig and in configuration files), even though changing the architecture won't work, since other things get set from -DBOARD=<board>. Many boards also allow changing the architecture symbols independently from the SoC symbols, which doesn't make sense. Get rid of all assignments to CONFIG_<arch> symbols and clean up the relationships between symbols and the configuration interface, like this: 1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and turn the CONFIG_<arch> symbols into invisible (promptless/nonconfigurable) symbols instead. Getting rid of the choice allows the symbols to be 'select'ed (choice symbols don't support 'select'). 2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols. This makes sense since you know the architecture if you know the SoC. Put the select on the SOC_* symbol instead for boards that don't have a SOC_SERIES_*. 3. Remove all assignments to CONFIG_<arch> symbols. The assignments would generate errors now, since the symbols are promptless. The change was done by grepping for assignments to CONFIG_<arch> symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the same defconfig file, and putting a 'select' on it instead. See https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed for a split-up version of this commit, which will make it easier to see how stuff was done. This needs to go in as one commit though. This change is safer than it might seem re. outstanding PRs, because any assignment to CONFIG_<arch> symbols generates an error now, making outdated stuff easy to catch. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-07 01:26:14 +08:00
select ARM
arch: Add imx7d m4 soc support The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual Cortex A7 core and Single Cortex M4 core. Zephyr was ported to run on the M4 core. In a later release, it will also communicate with the A7 core (running Linux) via RPmsg. The low level drivers come from NXP FreeRTOS BSP and are located at ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README The A7 core is responsible to load the M4 binary application into the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at bootloader level after the Linux system has booted. The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4: +---------------+-----------------+---------------------------+ | Memory Name | Start Address | Size | +===============+=================+===========================+ | TCML | 0x007F8000 | 32KB | +---------------+-----------------+---------------------------+ | TCMU | 0x20000000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM_S | 0x20180000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM | 0x00900000 | 128KB | +---------------+-----------------+---------------------------+ | DDR | 0x10000000 | 256MB | +---------------+-----------------+---------------------------+ Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-03-16 21:59:33 +08:00
select CPU_CORTEX_M4
soc: arm: nxp_imx: Select CPU DWT feature symbol The Data Watchpoint and Trace (DWT) is an optional debug unit for the Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides watchpoints, data tracing and system profiling capabilities. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-10 09:50:00 +08:00
select CPU_CORTEX_M_HAS_DWT
arch: Add imx7d m4 soc support The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual Cortex A7 core and Single Cortex M4 core. Zephyr was ported to run on the M4 core. In a later release, it will also communicate with the A7 core (running Linux) via RPmsg. The low level drivers come from NXP FreeRTOS BSP and are located at ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README The A7 core is responsible to load the M4 binary application into the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at bootloader level after the Linux system has booted. The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4: +---------------+-----------------+---------------------------+ | Memory Name | Start Address | Size | +===============+=================+===========================+ | TCML | 0x007F8000 | 32KB | +---------------+-----------------+---------------------------+ | TCMU | 0x20000000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM_S | 0x20180000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM | 0x00900000 | 128KB | +---------------+-----------------+---------------------------+ | DDR | 0x10000000 | 256MB | +---------------+-----------------+---------------------------+ Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-03-16 21:59:33 +08:00
select SOC_FAMILY_IMX
select CLOCK_CONTROL
select CPU_HAS_FPU
help
Enable support for i.MX7 M4 MCU series