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zephyr/soc/arm/nxp_imx/mcimx7_m4/Kconfig.defconfig.series

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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 20:45:29 +08:00
# iMX7 M4 core series
arch: Add imx7d m4 soc support The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual Cortex A7 core and Single Cortex M4 core. Zephyr was ported to run on the M4 core. In a later release, it will also communicate with the A7 core (running Linux) via RPmsg. The low level drivers come from NXP FreeRTOS BSP and are located at ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README The A7 core is responsible to load the M4 binary application into the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at bootloader level after the Linux system has booted. The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4: +---------------+-----------------+---------------------------+ | Memory Name | Start Address | Size | +===============+=================+===========================+ | TCML | 0x007F8000 | 32KB | +---------------+-----------------+---------------------------+ | TCMU | 0x20000000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM_S | 0x20180000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM | 0x00900000 | 128KB | +---------------+-----------------+---------------------------+ | DDR | 0x10000000 | 256MB | +---------------+-----------------+---------------------------+ Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-03-16 21:59:33 +08:00
# Copyright (c) 2017, NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_IMX7_M4
config SOC_SERIES
soc: defconfig.series: Consistently quote string defaults In preparation for introducing a warning. Unquoted string defaults work through a quirk of Kconfig (undefined symbols get their name as their string value), but look confusing. It's done inconsistently now too. Suggested by Kumar Gala. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-05-26 03:09:37 +08:00
default "mcimx7_m4"
arch: Add imx7d m4 soc support The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual Cortex A7 core and Single Cortex M4 core. Zephyr was ported to run on the M4 core. In a later release, it will also communicate with the A7 core (running Linux) via RPmsg. The low level drivers come from NXP FreeRTOS BSP and are located at ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README The A7 core is responsible to load the M4 binary application into the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at bootloader level after the Linux system has booted. The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4: +---------------+-----------------+---------------------------+ | Memory Name | Start Address | Size | +===============+=================+===========================+ | TCML | 0x007F8000 | 32KB | +---------------+-----------------+---------------------------+ | TCMU | 0x20000000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM_S | 0x20180000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM | 0x00900000 | 128KB | +---------------+-----------------+---------------------------+ | DDR | 0x10000000 | 256MB | +---------------+-----------------+---------------------------+ Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-03-16 21:59:33 +08:00
config NUM_IRQS
# must be >= the highest interrupt number used
default 127
arm: soc: move arm SoCs to top-dir Move the SoC outside of the architecture tree and put them at the same level as boards and architectures allowing both SoCs and boards to be maintained outside the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-04 04:47:02 +08:00
source "soc/arm/nxp_imx/mcimx7_m4/Kconfig.defconfig.mcimx7_m4"
arch: Add imx7d m4 soc support The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual Cortex A7 core and Single Cortex M4 core. Zephyr was ported to run on the M4 core. In a later release, it will also communicate with the A7 core (running Linux) via RPmsg. The low level drivers come from NXP FreeRTOS BSP and are located at ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README The A7 core is responsible to load the M4 binary application into the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at bootloader level after the Linux system has booted. The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4: +---------------+-----------------+---------------------------+ | Memory Name | Start Address | Size | +===============+=================+===========================+ | TCML | 0x007F8000 | 32KB | +---------------+-----------------+---------------------------+ | TCMU | 0x20000000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM_S | 0x20180000 | 32KB | +---------------+-----------------+---------------------------+ | OCRAM | 0x00900000 | 128KB | +---------------+-----------------+---------------------------+ | DDR | 0x10000000 | 256MB | +---------------+-----------------+---------------------------+ Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-03-16 21:59:33 +08:00
endif # SOC_SERIES_IMX7_M4