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zephyr/dts/x86/qemu_x86.fixup

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dts: Cleanup 16550 device tree support 1. Use compatible "ns16550" to match upstream binding 2. Add reg-shift as optional property to binding yaml Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-11 01:15:28 +08:00
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_F0009000_CURRENT_SPEED
dts: x86: Add device tree support for qemu_x86 patch add device tree support for ia32 soc and qemu_x86 board port Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-08 02:07:36 +08:00
dts: Cleanup 16550 device tree support 1. Use compatible "ns16550" to match upstream binding 2. Add reg-shift as optional property to binding yaml Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-11 01:15:28 +08:00
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_F0009000_LABEL
dts: x86: Add device tree support for qemu_x86 patch add device tree support for ia32 soc and qemu_x86 board port Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-08 02:07:36 +08:00
dts: Cleanup 16550 device tree support 1. Use compatible "ns16550" to match upstream binding 2. Add reg-shift as optional property to binding yaml Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-11 01:15:28 +08:00
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_F0008000_CURRENT_SPEED
dts: x86: Add device tree support for qemu_x86 patch add device tree support for ia32 soc and qemu_x86 board port Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-08 02:07:36 +08:00
dts: Cleanup 16550 device tree support 1. Use compatible "ns16550" to match upstream binding 2. Add reg-shift as optional property to binding yaml Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-11 01:15:28 +08:00
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_F0008000_LABEL
dts: x86: Add device tree support for qemu_x86 patch add device tree support for ia32 soc and qemu_x86 board port Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-08 02:07:36 +08:00
#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS