2015-08-27 05:56:43 +08:00
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/* dw_i2c.h - header for Design Ware I2C operations */
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/*
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* Copyright (c) 2015 Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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2015-09-20 10:54:53 +08:00
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#ifndef __DRIVERS_I2C_DW_H
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#define __DRIVERS_I2C_DW_H
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2015-08-27 05:56:43 +08:00
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#include <i2c.h>
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#include <stdbool.h>
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2015-08-31 17:00:42 +08:00
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#ifdef CONFIG_PCI
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#include <pci/pci.h>
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#include <pci/pci_mgr.h>
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#endif /* CONFIG_PCI */
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2015-08-27 05:56:43 +08:00
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2015-09-20 10:54:53 +08:00
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#define I2C_DW_MAGIC_KEY 0x44570140
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2015-08-27 05:56:43 +08:00
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typedef void (*i2c_isr_cb_t)(struct device *port);
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#define IC_ACTIVITY (1 << 0)
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#define IC_ENABLE_BIT (1 << 0)
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/* dev->state values from IC_DATA_CMD Data transfer mode settings (bit 8) */
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2015-09-20 10:54:53 +08:00
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#define I2C_DW_STATE_READY (0)
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#define I2C_DW_CMD_SEND (1 << 0)
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#define I2C_DW_CMD_RECV (1 << 1)
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#define I2C_DW_CMD_ERROR (1 << 2)
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2015-08-27 05:56:43 +08:00
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#define DW_ENABLE_TX_INT_I2C_MASTER (DW_INTR_STAT_TX_OVER | \
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DW_INTR_STAT_TX_EMPTY | \
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DW_INTR_STAT_TX_ABRT | \
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DW_INTR_STAT_STOP_DET)
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#define DW_ENABLE_RX_INT_I2C_MASTER (DW_INTR_STAT_RX_UNDER | \
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DW_INTR_STAT_RX_OVER | \
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DW_INTR_STAT_RX_FULL | \
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DW_INTR_STAT_STOP_DET)
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#define DW_ENABLE_TX_INT_I2C_SLAVE (DW_INTR_STAT_RD_REQ | \
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DW_INTR_STAT_TX_ABRT | \
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DW_INTR_STAT_STOP_DET)
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#define DW_ENABLE_RX_INT_I2C_SLAVE (DW_INTR_STAT_RX_FULL | \
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DW_INTR_STAT_STOP_DET)
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#define DW_DISABLE_ALL_I2C_INT 0x00000000
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/* IC_CON Low count and high count default values */
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/* TODO verify values for high and fast speed */
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#define I2C_STD_HCNT (CONFIG_I2C_CLOCK_SPEED * 4)
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#define I2C_STD_LCNT (CONFIG_I2C_CLOCK_SPEED * 5)
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#define I2C_FS_HCNT ((CONFIG_I2C_CLOCK_SPEED * 6) / 8)
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#define I2C_FS_LCNT ((CONFIG_I2C_CLOCK_SPEED * 7) / 8)
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#define I2C_HS_HCNT ((CONFIG_I2C_CLOCK_SPEED * 6) / 8)
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#define I2C_HS_LCNT ((CONFIG_I2C_CLOCK_SPEED * 7) / 8)
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/*
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* DesignWare speed values don't directly translate from the Zephyr speed
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* selections in include/i2c.h so here we do a little translation
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*/
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2015-09-20 10:54:53 +08:00
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#define I2C_DW_SPEED_STANDARD 0x1
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#define I2C_DW_SPEED_FAST 0x2
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#define I2C_DW_SPEED_FAST_PLUS 0x2
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#define I2C_DW_SPEED_HIGH 0x3
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2015-08-27 05:56:43 +08:00
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/*
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* These values have been randomly selected. It would be good to test different
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* watermark levels for performance capabilities
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*/
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2015-09-20 10:54:53 +08:00
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#define I2C_DW_TX_WATERMARK 2
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#define I2C_DW_RX_WATERMARK 7
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#define I2C_DW_FIFO_DEPTH 16
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2015-08-27 05:56:43 +08:00
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struct dw_i2c_rom_config {
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uint32_t base_address;
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uint32_t interrupt_vector;
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uint32_t interrupt_mask;
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2015-08-31 17:00:42 +08:00
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#ifdef CONFIG_PCI
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struct pci_dev_info pci_dev;
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#endif /* CONFIG_PCI */
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2015-08-27 05:56:43 +08:00
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i2c_isr_cb_t config_func;
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};
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struct dw_i2c_dev_config {
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union dev_config app_config;
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volatile uint8_t state; /* last direction of transfer */
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uint8_t slave_mode;
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uint8_t rx_len;
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uint8_t *rx_buffer;
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uint8_t tx_len;
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uint8_t *tx_buffer;
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uint8_t rx_tx_len;
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bool support_hs_mode;
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uint16_t hcnt;
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uint16_t lcnt;
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};
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void dw_i2c_isr(struct device *port);
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extern int dw_i2c_initialize(struct device *port);
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2015-09-20 10:54:53 +08:00
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#endif /* __DRIVERS_I2C_DW_H */
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