2017-05-02 22:55:08 +08:00
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/*
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* Copyright (c) 2017 Linaro Limited
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* Copyright (c) 2017 BayLibre, SAS.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef DRIVERS_FLASH_STM32_H
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#define DRIVERS_FLASH_STM32_H
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#include <flash_registers.h>
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#if defined(CONFIG_SOC_SERIES_STM32F4X)
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#include <flash_map.h>
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#endif
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#if defined(CONFIG_SOC_SERIES_STM32L4X)
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#include <clock_control.h>
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#include <clock_control/stm32_clock_control.h>
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#endif
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struct flash_stm32_priv {
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#if defined(CONFIG_SOC_SERIES_STM32F4X)
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struct stm32f4x_flash *regs;
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#elif defined(CONFIG_SOC_SERIES_STM32L4X)
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struct stm32l4x_flash *regs;
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/* clock subsystem driving this peripheral */
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struct stm32_pclken pclken;
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#endif
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struct k_sem sem;
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};
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2017-08-31 02:02:10 +08:00
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#define FLASH_STM32_PRIV(dev) ((struct flash_stm32_priv *)((dev)->driver_data))
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#define FLASH_STM32_REGS(dev) (FLASH_STM32_PRIV(dev)->regs)
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2017-05-02 22:55:08 +08:00
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2017-08-31 02:02:10 +08:00
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bool flash_stm32_valid_range(struct device *dev, off_t offset,
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u32_t len, bool write);
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2017-05-02 22:55:08 +08:00
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2017-08-31 02:02:10 +08:00
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int flash_stm32_write_range(struct device *dev, unsigned int offset,
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const void *data, unsigned int len);
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2017-05-02 22:55:08 +08:00
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2017-08-31 02:02:10 +08:00
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int flash_stm32_block_erase_loop(struct device *dev, unsigned int offset,
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unsigned int len);
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2017-05-02 22:55:08 +08:00
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2017-08-31 02:02:10 +08:00
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int flash_stm32_wait_flash_idle(struct device *dev);
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2017-05-02 22:55:08 +08:00
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#endif /* DRIVERS_FLASH_STM32_H */
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