OrgZephyr/zephyr
OrgZephyr
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr.git
1
0
Fork 0
Code Issues Releases Wiki Activity
zephyr/soc/arc/snps_arc_iot/dts_fixup.h

64 lines
2.6 KiB
C
Raw Normal View History

board: add the initial support of iotdk The initial support of iotdk which is a board based on Synopsys ARC IoT SoC. In this commit, it includes * processor support * UART driver Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-11-16 12:10:55 +08:00
/*
* Copyright (c) 2018 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
/* SoC level DTS fixup file */
/* CCM configuration */
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_DCCM_BASE_ADDRESS DT_ARC_DCCM_80000000_BASE_ADDRESS
#define DT_DCCM_SIZE (DT_ARC_DCCM_80000000_SIZE >> 10)
board: add the initial support of iotdk The initial support of iotdk which is a board based on Synopsys ARC IoT SoC. In this commit, it includes * processor support * UART driver Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-11-16 12:10:55 +08:00
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_ICCM_BASE_ADDRESS DT_ARC_ICCM_20000000_BASE_ADDRESS
#define DT_ICCM_SIZE (DT_ARC_ICCM_20000000_SIZE >> 10)
board: add the initial support of iotdk The initial support of iotdk which is a board based on Synopsys ARC IoT SoC. In this commit, it includes * processor support * UART driver Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-11-16 12:10:55 +08:00
/*
* UART configuration
*/
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_80014000_BASE_ADDRESS
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_80014000_IRQ_0
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_80014000_CLOCK_FREQUENCY
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_80014000_CURRENT_SPEED
#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_80014000_LABEL
#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_80014000_IRQ_0_PRIORITY
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
uart/ns16550, drivers/pcie: add PCI(e) support A parallel PCI implementation ("pcie") is added with features for PCIe. In particular, message-signaled interrupts (MSI) are supported, which are essential to the use of any non-trivial PCIe device. The NS16550 UART driver is modified to use pcie. pcie is a complete replacement for the old PCI support ("pci"). It is smaller, by an order of magnitude, and cleaner. Both pci and pcie can (and do) coexist in the same builds, but the intent is to rework any existing drivers that depend on pci and ultimately remove pci entirely. This patch is large, but things in mirror are smaller than they appear. Most of the modified files are configuration-related, and are changed only slightly to accommodate the modified UART driver. Deficiencies: 64-bit support is minimal. The code works fine with 64-bit capable devices, but will not cooperate with MMIO regions (or MSI targets) that have high bits set. This is not needed on any current boards, and is unlikely to be needed in the future. Only superficial changes would be required if we change our minds. The method specifying PCI endpoints in devicetree is somewhat kludgey. The "right" way would be to hang PCI devices off a topological tree; while this would be more aesthetically pleasing, I don't think it's worth the effort, given our non-standard use of devicetree. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-03 01:06:07 +08:00
#ifdef DT_NS16550_80014000_DLF
#define DT_UART_NS16550_PORT_0_DLF DT_NS16550_80014000_DLF
#endif
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_80014100_BASE_ADDRESS
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_80014100_IRQ_0
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_80014100_CLOCK_FREQUENCY
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_80014100_CURRENT_SPEED
#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_80014100_LABEL
#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_80014100_IRQ_0_PRIORITY
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
uart/ns16550, drivers/pcie: add PCI(e) support A parallel PCI implementation ("pcie") is added with features for PCIe. In particular, message-signaled interrupts (MSI) are supported, which are essential to the use of any non-trivial PCIe device. The NS16550 UART driver is modified to use pcie. pcie is a complete replacement for the old PCI support ("pci"). It is smaller, by an order of magnitude, and cleaner. Both pci and pcie can (and do) coexist in the same builds, but the intent is to rework any existing drivers that depend on pci and ultimately remove pci entirely. This patch is large, but things in mirror are smaller than they appear. Most of the modified files are configuration-related, and are changed only slightly to accommodate the modified UART driver. Deficiencies: 64-bit support is minimal. The code works fine with 64-bit capable devices, but will not cooperate with MMIO regions (or MSI targets) that have high bits set. This is not needed on any current boards, and is unlikely to be needed in the future. Only superficial changes would be required if we change our minds. The method specifying PCI endpoints in devicetree is somewhat kludgey. The "right" way would be to hang PCI devices off a topological tree; while this would be more aesthetically pleasing, I don't think it's worth the effort, given our non-standard use of devicetree. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-03 01:06:07 +08:00
#ifdef DT_NS16550_80014100_DLF
#define DT_UART_NS16550_PORT_1_DLF DT_NS16550_80014100_DLF
#endif
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_2_BASE_ADDR DT_NS16550_80014200_BASE_ADDRESS
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_2_IRQ DT_NS16550_80014200_IRQ_0
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_2_CLK_FREQ DT_NS16550_80014200_CLOCK_FREQUENCY
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_2_BAUD_RATE DT_NS16550_80014200_CURRENT_SPEED
#define DT_UART_NS16550_PORT_2_NAME DT_NS16550_80014200_LABEL
#define DT_UART_NS16550_PORT_2_IRQ_PRI DT_NS16550_80014200_IRQ_0_PRIORITY
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
uart/ns16550, drivers/pcie: add PCI(e) support A parallel PCI implementation ("pcie") is added with features for PCIe. In particular, message-signaled interrupts (MSI) are supported, which are essential to the use of any non-trivial PCIe device. The NS16550 UART driver is modified to use pcie. pcie is a complete replacement for the old PCI support ("pci"). It is smaller, by an order of magnitude, and cleaner. Both pci and pcie can (and do) coexist in the same builds, but the intent is to rework any existing drivers that depend on pci and ultimately remove pci entirely. This patch is large, but things in mirror are smaller than they appear. Most of the modified files are configuration-related, and are changed only slightly to accommodate the modified UART driver. Deficiencies: 64-bit support is minimal. The code works fine with 64-bit capable devices, but will not cooperate with MMIO regions (or MSI targets) that have high bits set. This is not needed on any current boards, and is unlikely to be needed in the future. Only superficial changes would be required if we change our minds. The method specifying PCI endpoints in devicetree is somewhat kludgey. The "right" way would be to hang PCI devices off a topological tree; while this would be more aesthetically pleasing, I don't think it's worth the effort, given our non-standard use of devicetree. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-03 01:06:07 +08:00
#ifdef DT_NS16550_80014200_DLF
#define DT_UART_NS16550_PORT_2_DLF DT_NS16550_80014200_DLF
#endif
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_3_BASE_ADDR DT_NS16550_80014300_BASE_ADDRESS
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_3_IRQ DT_NS16550_80014300_IRQ_0
board: iotdk: necessary clean up based on latest master branch * clean up the DTS related definitions * code cleanup * do the tests/kernel sannity check Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-12-12 19:16:36 +08:00
#define DT_UART_NS16550_PORT_3_CLK_FREQ DT_NS16550_80014300_CLOCK_FREQUENCY
uart/ns16550: Use DT_ prefix for remaining device configs Previous rename from CONFIG_* to DT_* left a few remaining CONFIG_*. So rename them manually now. Fix #13753 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 06:26:03 +08:00
#define DT_UART_NS16550_PORT_3_BAUD_RATE DT_NS16550_80014300_CURRENT_SPEED
#define DT_UART_NS16550_PORT_3_NAME DT_NS16550_80014300_LABEL
#define DT_UART_NS16550_PORT_3_IRQ_PRI DT_NS16550_80014300_IRQ_0_PRIORITY
board: add the initial support of iotdk The initial support of iotdk which is a board based on Synopsys ARC IoT SoC. In this commit, it includes * processor support * UART driver Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-11-16 12:10:55 +08:00
uart/ns16550, drivers/pcie: add PCI(e) support A parallel PCI implementation ("pcie") is added with features for PCIe. In particular, message-signaled interrupts (MSI) are supported, which are essential to the use of any non-trivial PCIe device. The NS16550 UART driver is modified to use pcie. pcie is a complete replacement for the old PCI support ("pci"). It is smaller, by an order of magnitude, and cleaner. Both pci and pcie can (and do) coexist in the same builds, but the intent is to rework any existing drivers that depend on pci and ultimately remove pci entirely. This patch is large, but things in mirror are smaller than they appear. Most of the modified files are configuration-related, and are changed only slightly to accommodate the modified UART driver. Deficiencies: 64-bit support is minimal. The code works fine with 64-bit capable devices, but will not cooperate with MMIO regions (or MSI targets) that have high bits set. This is not needed on any current boards, and is unlikely to be needed in the future. Only superficial changes would be required if we change our minds. The method specifying PCI endpoints in devicetree is somewhat kludgey. The "right" way would be to hang PCI devices off a topological tree; while this would be more aesthetically pleasing, I don't think it's worth the effort, given our non-standard use of devicetree. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-03 01:06:07 +08:00
#ifdef DT_NS16550_80014300_DLF
#define DT_UART_NS16550_PORT_3_DLF DT_NS16550_80014300_DLF
#endif
board: add the initial support of iotdk The initial support of iotdk which is a board based on Synopsys ARC IoT SoC. In this commit, it includes * processor support * UART driver Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-11-16 12:10:55 +08:00
/* End of SoC Level DTS fixup file */