2017-08-26 06:13:39 +08:00
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2018-09-15 01:43:44 +08:00
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_KINETIS_SIM_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_KINETIS_SIM_H_
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2017-08-26 06:13:39 +08:00
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#define KINETIS_SIM_CORESYS_CLK 0
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#define KINETIS_SIM_PLATFORM_CLK 1
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#define KINETIS_SIM_BUS_CLK 2
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2019-06-25 22:28:04 +08:00
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#define KINETIS_SIM_FAST_PERIPHERAL_CLK 5
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2018-04-24 03:27:43 +08:00
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#define KINETIS_SIM_LPO_CLK 19
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2020-05-15 17:07:26 +08:00
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#define KINETIS_SIM_DMAMUX_CLK KINETIS_SIM_BUS_CLK
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#define KINETIS_SIM_DMA_CLK KINETIS_SIM_CORESYS_CLK
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2020-08-24 17:27:07 +08:00
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#define KINETIS_SIM_SIM_SOPT7 7
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2017-08-26 06:13:39 +08:00
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2020-07-02 20:14:18 +08:00
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#define KINETIS_SIM_PLLFLLSEL_MCGFLLCLK 0
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#define KINETIS_SIM_PLLFLLSEL_MCGPLLCLK 1
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#define KINETIS_SIM_PLLFLLSEL_IRC48MHZ 3
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#define KINETIS_SIM_ER32KSEL_OSC32KCLK 0
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#define KINETIS_SIM_ER32KSEL_RTC 2
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#define KINETIS_SIM_ER32KSEL_LPO1KHZ 3
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2018-09-15 01:43:44 +08:00
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_KINETIS_SIM_H_ */
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