2016-10-19 05:43:40 +08:00
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#
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# Copyright (c) 2014 Wind River Systems, Inc.
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# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
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#
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2017-01-19 09:01:01 +08:00
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# SPDX-License-Identifier: Apache-2.0
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2016-10-19 05:43:40 +08:00
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#
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if SOC_EM7D
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config SOC
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default em7d
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config NUM_IRQ_PRIO_LEVELS
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# This processor supports 4 priority levels:
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# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
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2017-07-11 10:39:54 +08:00
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default 4
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2016-10-19 05:43:40 +08:00
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config NUM_IRQS
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# must be > the highest interrupt number used
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2017-06-15 16:32:01 +08:00
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default 38 if BOARD_EM_STARTERKIT_R23
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default 36 if BOARD_EM_STARTERKIT_R22
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2016-10-19 05:43:40 +08:00
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2017-11-29 17:31:55 +08:00
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config ARC_MPU_VER
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default 3 if BOARD_EM_STARTERKIT_R23
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default 2 if BOARD_EM_STARTERKIT_R22
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2016-10-19 05:43:40 +08:00
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config RGF_NUM_BANKS
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default 1
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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2017-06-15 16:32:01 +08:00
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default 25000000 if BOARD_EM_STARTERKIT_R23
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default 30000000 if BOARD_EM_STARTERKIT_R22
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2016-10-19 05:43:40 +08:00
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config HARVARD
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2017-11-29 17:31:55 +08:00
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def_bool y
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config ARC_FIRQ
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def_bool n if BOARD_EM_STARTERKIT_R23
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def_bool y if BOARD_EM_STARTERKIT_R22
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2016-10-19 05:43:40 +08:00
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2016-11-05 05:48:23 +08:00
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config CACHE_FLUSHING
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def_bool y
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2018-02-01 16:36:47 +08:00
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if (ARC_MPU_VER = 2)
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config MAIN_STACK_SIZE
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default 2048
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config IDLE_STACK_SIZE
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default 2048
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if ZTEST
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config ZTEST_STACKSIZE
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default 2048
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endif # ZTEST
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endif # ARC_MPU_VER
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2016-10-19 05:43:40 +08:00
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endif #SOC_EM7D
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