2022-07-21 18:46:36 +08:00
|
|
|
# Copyright (c) 2020 Intel Corporation
|
|
|
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
|
|
|
|
|
|
if SOC_SERIES_INTEL_ADSP_CAVS
|
|
|
|
|
|
|
|
|
|
config SOC_SERIES
|
|
|
|
|
string
|
|
|
|
|
default "cavs"
|
|
|
|
|
|
|
|
|
|
config INTEL_ADSP_CAVS
|
|
|
|
|
def_bool y
|
|
|
|
|
|
|
|
|
|
source "soc/xtensa/intel_adsp/cavs/Kconfig.defconfig.cavs*"
|
|
|
|
|
|
2022-08-25 19:38:17 +08:00
|
|
|
config DMA_INTEL_ADSP_GPDMA
|
|
|
|
|
default y
|
|
|
|
|
depends on DMA
|
|
|
|
|
|
|
|
|
|
config XTENSA_CCOUNT_HZ
|
2022-09-01 02:43:22 +08:00
|
|
|
default 400000000
|
2022-08-25 19:38:17 +08:00
|
|
|
|
2022-08-28 19:28:53 +08:00
|
|
|
config SYS_CLOCK_TICKS_PER_SEC
|
|
|
|
|
default 50000
|
|
|
|
|
|
|
|
|
|
config SMP
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config XTENSA_TIMER
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config KERNEL_ENTRY
|
|
|
|
|
default "_MainEntry"
|
|
|
|
|
|
|
|
|
|
config MULTI_LEVEL_INTERRUPTS
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config 2ND_LEVEL_INTERRUPTS
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config DYNAMIC_INTERRUPTS
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
if LOG
|
|
|
|
|
|
|
|
|
|
config LOG_BACKEND_ADSP
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
endif # LOG
|
|
|
|
|
|
2022-07-21 18:46:36 +08:00
|
|
|
endif # SOC_SERIES_INTEL_ADSP_CAVS
|
