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zephyr/dts/bindings/interrupt-controller/xtensa,intc.yaml

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dts: interrupt_controller: Add dts support for DesignWare controller Add dts support for multilevel DW interrupt controller Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-03-24 04:29:31 +08:00
title: Xtensa Core Interrupt Controller
description: >
This binding describes Xtensa Core Interrupt controller
dts/bindings: Move common properties into a base.yaml Move common properties like 'compatible', 'reg', 'reg-names', 'interrupts', 'interrupt-names', and 'label' into one common base.yaml that all the other yaml's can inherit from. This removes both duplication and inconsistent definition. The device specific yamls just need to say if a property is 'required' or not. NOTE: due to some generation conflicts we did not covert 'soc-nv-flash.yaml' to use base.yaml. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-08 00:12:49 +08:00
inherits:
dts: Add base interrupt-controller to dts bindings Introduce a intc.yaml that interrupt controller bindings should inherit from. intc.yaml defines the properties "interrupt-controller" and "#interrupt-cells" which all interrupt controllers should have. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-09 20:56:55 +08:00
!include [interrupt-controller.yaml, base.yaml]
dts/bindings: Move common properties into a base.yaml Move common properties like 'compatible', 'reg', 'reg-names', 'interrupts', 'interrupt-names', and 'label' into one common base.yaml that all the other yaml's can inherit from. This removes both duplication and inconsistent definition. The device specific yamls just need to say if a property is 'required' or not. NOTE: due to some generation conflicts we did not covert 'soc-nv-flash.yaml' to use base.yaml. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-08 00:12:49 +08:00
dts: interrupt_controller: Add dts support for DesignWare controller Add dts support for multilevel DW interrupt controller Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-03-24 04:29:31 +08:00
properties:
compatible:
constraint: "xtensa,core-intc"
reg:
category: required
"#cells":
- irq
- sense
DTS: interrupt controller: Define IRQ priorities for CAVS & DW ICTL IRQ priorities for CAVS and DW were previously defined in Kconfig. They are now defined via DTS and removed from Kconfig. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-05-28 01:41:57 +08:00
- priority