54 lines
1.0 KiB
Plaintext
54 lines
1.0 KiB
Plaintext
|
/*
|
||
|
|
* Copyright (c) 2018 Linaro Limited
|
||
|
|
*
|
||
|
|
* SPDX-License-Identifier: Apache-2.0
|
||
|
|
*/
|
||
|
|
|
||
|
|
/ {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
|
||
|
|
cpus {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
cpu@0 {
|
||
|
|
clock-frequency = <0>;
|
||
|
|
compatible = "microsemi,miv", "riscv";
|
||
|
|
device_type = "cpu";
|
||
|
|
reg = <0>;
|
||
|
|
riscv,isa = "rv32imac";
|
||
|
|
hlic: interrupt-controller {
|
||
|
|
#interrupt-cells = <1>;
|
||
|
|
compatible = "riscv,cpu-intc";
|
||
|
|
interrupt-controller;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
soc {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
compatible = "microsemi,miv-soc", "simple-bus";
|
||
|
|
ranges;
|
||
|
|
|
||
|
|
plic: interrupt-controller@40000000 {
|
||
|
|
#interrupt-cells = <1>;
|
||
|
|
compatible = "riscv,plic0";
|
||
|
|
interrupt-controller;
|
||
|
|
interrupts-extended = <&hlic 11>;
|
||
|
|
reg = <0x40000000 0x4000000>;
|
||
|
|
reg-names = "control";
|
||
|
|
riscv,max-priority = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart0: uart@70001000 {
|
||
|
|
compatible = "microsemi,coreuart";
|
||
|
|
reg = <0x70001000 0x1000>;
|
||
|
|
label = "uart_0";
|
||
|
|
status = "disabled";
|
||
|
|
current-speed = <0>;
|
||
|
|
clock-frequency = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|