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zephyr/boards/riscv/rv32m1_vega/Kconfig.defconfig

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license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 21:08:09 +08:00
# SPDX-License-Identifier: Apache-2.0
boards: riscv32: add rv32m1_vega This board directory supports the RV32M1 Vega board when targeting a RISC-V CPU core on the main SoC. Currently, only RI5CY support is provided via the rv32m1_vega_ri5cy board name. Signed-off-by: Marti Bolivar <marti@foundries.io> Signed-off-by: Michael Scott <mike@foundries.io>
2018-11-29 05:23:51 +08:00
if BOARD_RV32M1_VEGA
config BOARD
default "rv32m1_vega_ri5cy" if SOC_OPENISA_RV32M1_RI5CY
default "rv32m1_vega_zero_riscy" if SOC_OPENISA_RV32M1_ZERO_RISCY
boards: riscv: rv32m1: enable BT related configuration Specific SW defined BLE LL parameters need to be set if the user enables it on this platform. As such, conditionally enable them directly into the defconfig. INTMUX CH2 and CH3 are not available to be used if BT support is enabled on Vega, because they are used internally by the BLE SW LL Signed-off-by: David Leach <david.leach@nxp.com>
2019-09-19 18:35:00 +08:00
if BT
config BT_CTLR
default y
bluetooth: controller: openisa: encryption and decryption using CAUv3 Created unit tests for the encryption and decryption functions. Tested with the peripheral and with central_hr samples. Due to latency of CAUv3 when used as CCM inline accelerator only one of the PDU can be encrypted/decrypted within an bilateral exchange M->S + S->M in a connection event. If the RXed PDU is encrypted, the TXed PDU must be empty with More Data if there is data in the LLL queue. The TXed PDU will be encrypted when an empty PDU is RXed. Signed-off-by: Cristi Caciuloiu <cristian.caciuloiu@nxp.com>
2020-02-07 00:52:47 +08:00
#TODO: Resolve the complete non-BLE support for crypto CAU3 firmware/driver
#config HAS_RV32M1_CAU3
# bool
# default y if BT_CTLR_CRYPTO && !BT_CTLR_LE_ENC_SUPPORT
config HAS_RV32M1_CAU3_BLE
bool
bluetooth: controller: enable privacy for RV32M1 This patch adds the selection of the necessary CONFIG_* options for allowing the use of privacy on VEGA platform Signed-off-by: Jeanina Dragusin <ancajeanina.dragusin@nxp.com>
2020-01-06 21:10:25 +08:00
default y if BT_CTLR_CRYPTO && \
(BT_CTLR_LE_ENC_SUPPORT || BT_CTLR_PRIVACY_SUPPORT)
bluetooth: controller: openisa: encryption and decryption using CAUv3 Created unit tests for the encryption and decryption functions. Tested with the peripheral and with central_hr samples. Due to latency of CAUv3 when used as CCM inline accelerator only one of the PDU can be encrypted/decrypted within an bilateral exchange M->S + S->M in a connection event. If the RXed PDU is encrypted, the TXed PDU must be empty with More Data if there is data in the LLL queue. The TXed PDU will be encrypted when an empty PDU is RXed. Signed-off-by: Cristi Caciuloiu <cristian.caciuloiu@nxp.com>
2020-02-07 00:52:47 +08:00
boards: riscv: rv32m1: enable BT related configuration Specific SW defined BLE LL parameters need to be set if the user enables it on this platform. As such, conditionally enable them directly into the defconfig. INTMUX CH2 and CH3 are not available to be used if BT support is enabled on Vega, because they are used internally by the BLE SW LL Signed-off-by: David Leach <david.leach@nxp.com>
2019-09-19 18:35:00 +08:00
config RV32M1_INTMUX_CHANNEL_2
default n
config RV32M1_INTMUX_CHANNEL_3
default n
endif # BT
boards: riscv32: add rv32m1_vega This board directory supports the RV32M1 Vega board when targeting a RISC-V CPU core on the main SoC. Currently, only RI5CY support is provided via the rv32m1_vega_ri5cy board name. Signed-off-by: Marti Bolivar <marti@foundries.io> Signed-off-by: Michael Scott <mike@foundries.io>
2018-11-29 05:23:51 +08:00
endif # BOARD_RV32M1_VEGA