53 lines
832 B
Plaintext
53 lines
832 B
Plaintext
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/*
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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flash0: flash@b0000 {
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reg = <0x000B0000 0x68000>;
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};
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sram0: memory@118000 {
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compatible = "mmio-sram";
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reg = <0x00118000 0x10000>;
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};
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soc {
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uart0: uart@400f2400 {
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compatible = "ns16550";
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reg = <0x400f2400 0x400>;
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interrupts = <40 0>;
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current-speed = <38400>;
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label = "UART_0";
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reg-shift = <0>;
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};
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uart1: uart@400f2800 {
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compatible = "ns16550";
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reg = <0x400f2800 0x400>;
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interrupts = <41 0>;
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current-speed = <38400>;
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label = "UART_1";
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reg-shift = <0>;
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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